From patchwork Sat Jan 29 17:40:27 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduard - Gabriel Munteanu X-Patchwork-Id: 80948 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 39853B70FF for ; Sun, 30 Jan 2011 04:59:20 +1100 (EST) Received: from localhost ([127.0.0.1]:44954 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PjF4r-0004Pq-Ba for incoming@patchwork.ozlabs.org; Sat, 29 Jan 2011 12:59:13 -0500 Received: from [140.186.70.92] (port=59976 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PjEnI-00058w-PX for qemu-devel@nongnu.org; Sat, 29 Jan 2011 12:41:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PjEnG-0004gD-RO for qemu-devel@nongnu.org; Sat, 29 Jan 2011 12:41:04 -0500 Received: from mail-fx0-f45.google.com ([209.85.161.45]:35571) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PjEnG-0004be-JL for qemu-devel@nongnu.org; Sat, 29 Jan 2011 12:41:02 -0500 Received: by mail-fx0-f45.google.com with SMTP id 12so4523658fxm.4 for ; Sat, 29 Jan 2011 09:41:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:cc:subject:date:message-id :x-mailer:in-reply-to:references:in-reply-to:references; bh=7Ok8BOt3zYEdDvYRc9aw96ml392YtPtL6Y277wWCmdQ=; b=lZfZPUWge+DeEPMXsZEkNi5970UMe6rRrSnu792FHx1FraC5q7ErKMctYKMdMQijmL zMmO9tAqxyPZYxV/B3uHDpvmWGMnXufCk3trfoasumfTPZTKmf65WxHLhN8E0SWDZBq0 lzntwtxzsdDtf9loYCc8GyGQER9QYYrDqf7FI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; b=CO3pekY92W/0Q0hSseKv4Hy4X4M4r2U3gUk2xeMpvgIsjHEPT/lQHMcSO0Jutf/Eio VHkkORhaQj7iQ5Rq0RvmJs4tAwpuAXzAfXu3KN1V4p2lLl18zyLJS6v2wF78cp9XY+wE 5B4lz5gKRqZ8ExKRrmqgn6vTxXB7EATL3CGm8= Received: by 10.223.103.12 with SMTP id i12mr3871351fao.43.1296322860825; Sat, 29 Jan 2011 09:41:00 -0800 (PST) Received: from localhost.localdomain ([188.25.244.101]) by mx.google.com with ESMTPS id 21sm6822801fav.17.2011.01.29.09.40.58 (version=SSLv3 cipher=RC4-MD5); Sat, 29 Jan 2011 09:41:00 -0800 (PST) From: Eduard - Gabriel Munteanu To: joro@8bytes.org Date: Sat, 29 Jan 2011 19:40:27 +0200 Message-Id: X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.161.45 Cc: kvm@vger.kernel.org, qemu-devel@nongnu.org, blauwirbel@gmail.com, yamahata@valinux.co.jp, paul@codesourcery.com, Eduard - Gabriel Munteanu , avi@redhat.com Subject: [Qemu-devel] [PATCH 06/13] eepro100: use the DMA memory access interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This allows the device to work properly with an emulated IOMMU. Signed-off-by: Eduard - Gabriel Munteanu --- hw/eepro100.c | 97 +++++++++++++++++++++++++++++++++----------------------- 1 files changed, 57 insertions(+), 40 deletions(-) diff --git a/hw/eepro100.c b/hw/eepro100.c index edf48f6..58defcf 100644 --- a/hw/eepro100.c +++ b/hw/eepro100.c @@ -308,10 +308,12 @@ static const uint16_t eepro100_mdi_mask[] = { }; /* XXX: optimize */ -static void stl_le_phys(target_phys_addr_t addr, uint32_t val) +static void stl_le_phys(EEPRO100State * s, pcibus_t addr, uint32_t val) { + DMADevice *dma = &s->dev.dma; + val = cpu_to_le32(val); - cpu_physical_memory_write(addr, (const uint8_t *)&val, sizeof(val)); + dma_memory_write(dma, addr, (const uint8_t *)&val, sizeof(val)); } #define POLYNOMIAL 0x04c11db6 @@ -689,17 +691,19 @@ static void set_ru_state(EEPRO100State * s, ru_state_t state) static void dump_statistics(EEPRO100State * s) { + DMADevice *dma = &s->dev.dma; + /* Dump statistical data. Most data is never changed by the emulation * and always 0, so we first just copy the whole block and then those * values which really matter. * Number of data should check configuration!!! */ - cpu_physical_memory_write(s->statsaddr, - (uint8_t *) & s->statistics, s->stats_size); - stl_le_phys(s->statsaddr + 0, s->statistics.tx_good_frames); - stl_le_phys(s->statsaddr + 36, s->statistics.rx_good_frames); - stl_le_phys(s->statsaddr + 48, s->statistics.rx_resource_errors); - stl_le_phys(s->statsaddr + 60, s->statistics.rx_short_frame_errors); + dma_memory_write(dma, s->statsaddr, + (uint8_t *) & s->statistics, s->stats_size); + stl_le_phys(s, s->statsaddr + 0, s->statistics.tx_good_frames); + stl_le_phys(s, s->statsaddr + 36, s->statistics.rx_good_frames); + stl_le_phys(s, s->statsaddr + 48, s->statistics.rx_resource_errors); + stl_le_phys(s, s->statsaddr + 60, s->statistics.rx_short_frame_errors); #if 0 stw_le_phys(s->statsaddr + 76, s->statistics.xmt_tco_frames); stw_le_phys(s->statsaddr + 78, s->statistics.rcv_tco_frames); @@ -709,7 +713,9 @@ static void dump_statistics(EEPRO100State * s) static void read_cb(EEPRO100State *s) { - cpu_physical_memory_read(s->cb_address, (uint8_t *) &s->tx, sizeof(s->tx)); + DMADevice *dma = &s->dev.dma; + + dma_memory_read(dma, s->cb_address, (uint8_t *) &s->tx, sizeof(s->tx)); s->tx.status = le16_to_cpu(s->tx.status); s->tx.command = le16_to_cpu(s->tx.command); s->tx.link = le32_to_cpu(s->tx.link); @@ -719,6 +725,7 @@ static void read_cb(EEPRO100State *s) static void tx_command(EEPRO100State *s) { + DMADevice *dma = &s->dev.dma; uint32_t tbd_array = le32_to_cpu(s->tx.tbd_array_addr); uint16_t tcb_bytes = (le16_to_cpu(s->tx.tcb_bytes) & 0x3fff); /* Sends larger than MAX_ETH_FRAME_SIZE are allowed, up to 2600 bytes. */ @@ -739,18 +746,18 @@ static void tx_command(EEPRO100State *s) } assert(tcb_bytes <= sizeof(buf)); while (size < tcb_bytes) { - uint32_t tx_buffer_address = ldl_phys(tbd_address); - uint16_t tx_buffer_size = lduw_phys(tbd_address + 4); + uint32_t tx_buffer_address = dma_ldl(dma, tbd_address); + uint16_t tx_buffer_size = dma_lduw(dma, tbd_address + 4); #if 0 - uint16_t tx_buffer_el = lduw_phys(tbd_address + 6); + uint16_t tx_buffer_el = dma_lduw(dma, tbd_address + 6); #endif tbd_address += 8; TRACE(RXTX, logout ("TBD (simplified mode): buffer address 0x%08x, size 0x%04x\n", tx_buffer_address, tx_buffer_size)); tx_buffer_size = MIN(tx_buffer_size, sizeof(buf) - size); - cpu_physical_memory_read(tx_buffer_address, &buf[size], - tx_buffer_size); + dma_memory_read(dma, + tx_buffer_address, &buf[size], tx_buffer_size); size += tx_buffer_size; } if (tbd_array == 0xffffffff) { @@ -761,16 +768,16 @@ static void tx_command(EEPRO100State *s) if (s->has_extended_tcb_support && !(s->configuration[6] & BIT(4))) { /* Extended Flexible TCB. */ for (; tbd_count < 2; tbd_count++) { - uint32_t tx_buffer_address = ldl_phys(tbd_address); - uint16_t tx_buffer_size = lduw_phys(tbd_address + 4); - uint16_t tx_buffer_el = lduw_phys(tbd_address + 6); + uint32_t tx_buffer_address = dma_ldl(dma, tbd_address); + uint16_t tx_buffer_size = dma_lduw(dma, tbd_address + 4); + uint16_t tx_buffer_el = dma_lduw(dma, tbd_address + 6); tbd_address += 8; TRACE(RXTX, logout ("TBD (extended flexible mode): buffer address 0x%08x, size 0x%04x\n", tx_buffer_address, tx_buffer_size)); tx_buffer_size = MIN(tx_buffer_size, sizeof(buf) - size); - cpu_physical_memory_read(tx_buffer_address, &buf[size], - tx_buffer_size); + dma_memory_read(dma, + tx_buffer_address, &buf[size], tx_buffer_size); size += tx_buffer_size; if (tx_buffer_el & 1) { break; @@ -779,16 +786,16 @@ static void tx_command(EEPRO100State *s) } tbd_address = tbd_array; for (; tbd_count < s->tx.tbd_count; tbd_count++) { - uint32_t tx_buffer_address = ldl_phys(tbd_address); - uint16_t tx_buffer_size = lduw_phys(tbd_address + 4); - uint16_t tx_buffer_el = lduw_phys(tbd_address + 6); + uint32_t tx_buffer_address = dma_ldl(dma, tbd_address); + uint16_t tx_buffer_size = dma_lduw(dma, tbd_address + 4); + uint16_t tx_buffer_el = dma_lduw(dma, tbd_address + 6); tbd_address += 8; TRACE(RXTX, logout ("TBD (flexible mode): buffer address 0x%08x, size 0x%04x\n", tx_buffer_address, tx_buffer_size)); tx_buffer_size = MIN(tx_buffer_size, sizeof(buf) - size); - cpu_physical_memory_read(tx_buffer_address, &buf[size], - tx_buffer_size); + dma_memory_read(dma, + tx_buffer_address, &buf[size], tx_buffer_size); size += tx_buffer_size; if (tx_buffer_el & 1) { break; @@ -807,13 +814,14 @@ static void tx_command(EEPRO100State *s) static void set_multicast_list(EEPRO100State *s) { + DMADevice *dma = &s->dev.dma; uint16_t multicast_count = s->tx.tbd_array_addr & BITS(13, 0); uint16_t i; memset(&s->mult[0], 0, sizeof(s->mult)); TRACE(OTHER, logout("multicast list, multicast count = %u\n", multicast_count)); for (i = 0; i < multicast_count; i += 6) { uint8_t multicast_addr[6]; - cpu_physical_memory_read(s->cb_address + 10 + i, multicast_addr, 6); + dma_memory_read(dma, s->cb_address + 10 + i, multicast_addr, 6); TRACE(OTHER, logout("multicast entry %s\n", nic_dump(multicast_addr, 6))); unsigned mcast_idx = compute_mcast_idx(multicast_addr); assert(mcast_idx < 64); @@ -823,6 +831,8 @@ static void set_multicast_list(EEPRO100State *s) static void action_command(EEPRO100State *s) { + DMADevice *dma = &s->dev.dma; + for (;;) { bool bit_el; bool bit_s; @@ -847,12 +857,14 @@ static void action_command(EEPRO100State *s) /* Do nothing. */ break; case CmdIASetup: - cpu_physical_memory_read(s->cb_address + 8, &s->conf.macaddr.a[0], 6); + dma_memory_read(dma, + s->cb_address + 8, &s->conf.macaddr.a[0], 6); TRACE(OTHER, logout("macaddr: %s\n", nic_dump(&s->conf.macaddr.a[0], 6))); break; case CmdConfigure: - cpu_physical_memory_read(s->cb_address + 8, &s->configuration[0], - sizeof(s->configuration)); + dma_memory_read(dma, + s->cb_address + 8, + &s->configuration[0], sizeof(s->configuration)); TRACE(OTHER, logout("configuration: %s\n", nic_dump(&s->configuration[0], 16))); TRACE(OTHER, logout("configuration: %s\n", @@ -889,7 +901,7 @@ static void action_command(EEPRO100State *s) break; } /* Write new status. */ - stw_phys(s->cb_address, s->tx.status | ok_status | STATUS_C); + dma_stw(dma, s->cb_address, s->tx.status | ok_status | STATUS_C); if (bit_i) { /* CU completed action. */ eepro100_cx_interrupt(s); @@ -956,7 +968,7 @@ static void eepro100_cu_command(EEPRO100State * s, uint8_t val) /* Dump statistical counters. */ TRACE(OTHER, logout("val=0x%02x (dump stats)\n", val)); dump_statistics(s); - stl_le_phys(s->statsaddr + s->stats_size, 0xa005); + stl_le_phys(s, s->statsaddr + s->stats_size, 0xa005); break; case CU_CMD_BASE: /* Load CU base. */ @@ -967,7 +979,7 @@ static void eepro100_cu_command(EEPRO100State * s, uint8_t val) /* Dump and reset statistical counters. */ TRACE(OTHER, logout("val=0x%02x (dump stats and reset)\n", val)); dump_statistics(s); - stl_le_phys(s->statsaddr + s->stats_size, 0xa007); + stl_le_phys(s, s->statsaddr + s->stats_size, 0xa007); memset(&s->statistics, 0, sizeof(s->statistics)); break; case CU_SRESUME: @@ -1259,6 +1271,7 @@ static uint32_t eepro100_read_port(EEPRO100State * s) static void eepro100_write_port(EEPRO100State * s, uint32_t val) { val = le32_to_cpu(val); + DMADevice *dma = &s->dev.dma; uint32_t address = (val & ~PORT_SELECTION_MASK); uint8_t selection = (val & PORT_SELECTION_MASK); switch (selection) { @@ -1268,10 +1281,10 @@ static void eepro100_write_port(EEPRO100State * s, uint32_t val) case PORT_SELFTEST: TRACE(OTHER, logout("selftest address=0x%08x\n", address)); eepro100_selftest_t data; - cpu_physical_memory_read(address, (uint8_t *) & data, sizeof(data)); + dma_memory_read(dma, address, (uint8_t *) & data, sizeof(data)); data.st_sign = 0xffffffff; data.st_result = 0; - cpu_physical_memory_write(address, (uint8_t *) & data, sizeof(data)); + dma_memory_write(dma, address, (uint8_t *) & data, sizeof(data)); break; case PORT_SELECTIVE_RESET: TRACE(OTHER, logout("selective reset, selftest address=0x%08x\n", address)); @@ -1652,6 +1665,7 @@ static ssize_t nic_receive(VLANClientState *nc, const uint8_t * buf, size_t size * - Interesting packets should set bit 29 in power management driver register. */ EEPRO100State *s = DO_UPCAST(NICState, nc, nc)->opaque; + DMADevice *dma = &s->dev.dma; uint16_t rfd_status = 0xa000; static const uint8_t broadcast_macaddr[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; @@ -1734,8 +1748,9 @@ static ssize_t nic_receive(VLANClientState *nc, const uint8_t * buf, size_t size } /* !!! */ eepro100_rx_t rx; - cpu_physical_memory_read(s->ru_base + s->ru_offset, (uint8_t *) & rx, - offsetof(eepro100_rx_t, packet)); + dma_memory_read(dma, + s->ru_base + s->ru_offset, + (uint8_t *) & rx, offsetof(eepro100_rx_t, packet)); uint16_t rfd_command = le16_to_cpu(rx.command); uint16_t rfd_size = le16_to_cpu(rx.size); @@ -1749,9 +1764,11 @@ static ssize_t nic_receive(VLANClientState *nc, const uint8_t * buf, size_t size } TRACE(OTHER, logout("command 0x%04x, link 0x%08x, addr 0x%08x, size %u\n", rfd_command, rx.link, rx.rx_buf_addr, rfd_size)); - stw_phys(s->ru_base + s->ru_offset + offsetof(eepro100_rx_t, status), - rfd_status); - stw_phys(s->ru_base + s->ru_offset + offsetof(eepro100_rx_t, count), size); + dma_stw(dma, + s->ru_base + s->ru_offset + offsetof(eepro100_rx_t, status), + rfd_status); + dma_stw(dma, + s->ru_base + s->ru_offset + offsetof(eepro100_rx_t, count), size); /* Early receive interrupt not supported. */ #if 0 eepro100_er_interrupt(s); @@ -1765,8 +1782,8 @@ static ssize_t nic_receive(VLANClientState *nc, const uint8_t * buf, size_t size #if 0 assert(!(s->configuration[17] & BIT(0))); #endif - cpu_physical_memory_write(s->ru_base + s->ru_offset + - offsetof(eepro100_rx_t, packet), buf, size); + dma_memory_write(dma, s->ru_base + s->ru_offset + + offsetof(eepro100_rx_t, packet), buf, size); s->statistics.rx_good_frames++; eepro100_fr_interrupt(s); s->ru_offset = le32_to_cpu(rx.link);