diff mbox series

[v4,1/2] target/arm: allow DC CVA[D]P in user mode emulation

Message ID DS7PR12MB6309408A6BB4A469862CCA34AC49A@DS7PR12MB6309.namprd12.prod.outlook.com
State New
Headers show
Series target/arm: allow DC CVA[D]P in user mode emulation | expand

Commit Message

Zhuojia Shen June 1, 2023, 10:11 p.m. UTC
DC CVAP and DC CVADP instructions can be executed in EL0 on Linux,
either directly when SCTLR_EL1.UCI == 1 or emulated by the kernel (see
user_cache_maint_handler() in arch/arm64/kernel/traps.c).

This patch enables execution of the two instructions in user mode
emulation.

Signed-off-by: Zhuojia Shen <chaosdefinition@hotmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/helper.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

Comments

Philippe Mathieu-Daudé June 2, 2023, 10:27 a.m. UTC | #1
On 2/6/23 00:11, Zhuojia Shen wrote:
> DC CVAP and DC CVADP instructions can be executed in EL0 on Linux,
> either directly when SCTLR_EL1.UCI == 1 or emulated by the kernel (see
> user_cache_maint_handler() in arch/arm64/kernel/traps.c).
> 
> This patch enables execution of the two instructions in user mode
> emulation.
> 
> Signed-off-by: Zhuojia Shen <chaosdefinition@hotmail.com>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   target/arm/helper.c | 6 ++----
>   1 file changed, 2 insertions(+), 4 deletions(-)


> -#ifndef CONFIG_USER_ONLY
>   static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque,
>                             uint64_t value)
>   {
> @@ -7420,6 +7419,7 @@ static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque,
>       /* This won't be crossing page boundaries */
>       haddr = probe_read(env, vaddr, dline_size, mem_idx, GETPC());
>       if (haddr) {
> +#ifndef CONFIG_USER_ONLY

This ifdef'ry placement is odd. Is it to silent a
unused-but-set-variable warning?

>           ram_addr_t offset;
>           MemoryRegion *mr;
> @@ -7430,6 +7430,7 @@ static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque,
>           if (mr) {
>               memory_region_writeback(mr, offset, dline_size);
>           }
> +#endif /*CONFIG_USER_ONLY*/
>       }
>   }
>   
> @@ -7448,7 +7449,6 @@ static const ARMCPRegInfo dcpodp_reg[] = {
>         .fgt = FGT_DCCVADP,
>         .accessfn = aa64_cacheop_poc_access, .writefn = dccvap_writefn },
>   };
> -#endif /*CONFIG_USER_ONLY*/
Zhuojia Shen June 2, 2023, 5:11 p.m. UTC | #2
On 06/02/2023 12:27 PM +0200, Philippe Mathieu-Daudé wrote:
> On 2/6/23 00:11, Zhuojia Shen wrote:
> > DC CVAP and DC CVADP instructions can be executed in EL0 on Linux,
> > either directly when SCTLR_EL1.UCI == 1 or emulated by the kernel (see
> > user_cache_maint_handler() in arch/arm64/kernel/traps.c).
> > 
> > This patch enables execution of the two instructions in user mode
> > emulation.
> > 
> > Signed-off-by: Zhuojia Shen <chaosdefinition@hotmail.com>
> > Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> > ---
> >   target/arm/helper.c | 6 ++----
> >   1 file changed, 2 insertions(+), 4 deletions(-)
> 
> 
> > -#ifndef CONFIG_USER_ONLY
> >   static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque,
> >                             uint64_t value)
> >   {
> > @@ -7420,6 +7419,7 @@ static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque,
> >       /* This won't be crossing page boundaries */
> >       haddr = probe_read(env, vaddr, dline_size, mem_idx, GETPC());
> >       if (haddr) {
> > +#ifndef CONFIG_USER_ONLY
> 
> This ifdef'ry placement is odd. Is it to silent a
> unused-but-set-variable warning?

Yes, exactly.  Since we pass -Werror, ifdef'ing out the if statement
wouldn't even compile.

> 
> >           ram_addr_t offset;
> >           MemoryRegion *mr;
> > @@ -7430,6 +7430,7 @@ static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque,
> >           if (mr) {
> >               memory_region_writeback(mr, offset, dline_size);
> >           }
> > +#endif /*CONFIG_USER_ONLY*/
> >       }
> >   }
> > @@ -7448,7 +7449,6 @@ static const ARMCPRegInfo dcpodp_reg[] = {
> >         .fgt = FGT_DCCVADP,
> >         .accessfn = aa64_cacheop_poc_access, .writefn = dccvap_writefn },
> >   };
> > -#endif /*CONFIG_USER_ONLY*/
>
diff mbox series

Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0b7fd2e7e6..d4bee43bd0 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7405,7 +7405,6 @@  static const ARMCPRegInfo rndr_reginfo[] = {
       .access = PL0_R, .readfn = rndr_readfn },
 };
 
-#ifndef CONFIG_USER_ONLY
 static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque,
                           uint64_t value)
 {
@@ -7420,6 +7419,7 @@  static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque,
     /* This won't be crossing page boundaries */
     haddr = probe_read(env, vaddr, dline_size, mem_idx, GETPC());
     if (haddr) {
+#ifndef CONFIG_USER_ONLY
 
         ram_addr_t offset;
         MemoryRegion *mr;
@@ -7430,6 +7430,7 @@  static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque,
         if (mr) {
             memory_region_writeback(mr, offset, dline_size);
         }
+#endif /*CONFIG_USER_ONLY*/
     }
 }
 
@@ -7448,7 +7449,6 @@  static const ARMCPRegInfo dcpodp_reg[] = {
       .fgt = FGT_DCCVADP,
       .accessfn = aa64_cacheop_poc_access, .writefn = dccvap_writefn },
 };
-#endif /*CONFIG_USER_ONLY*/
 
 static CPAccessResult access_aa64_tid5(CPUARMState *env, const ARMCPRegInfo *ri,
                                        bool isread)
@@ -9092,7 +9092,6 @@  void register_cp_regs_for_features(ARMCPU *cpu)
     if (cpu_isar_feature(aa64_tlbios, cpu)) {
         define_arm_cp_regs(cpu, tlbios_reginfo);
     }
-#ifndef CONFIG_USER_ONLY
     /* Data Cache clean instructions up to PoP */
     if (cpu_isar_feature(aa64_dcpop, cpu)) {
         define_one_arm_cp_reg(cpu, dcpop_reg);
@@ -9101,7 +9100,6 @@  void register_cp_regs_for_features(ARMCPU *cpu)
             define_one_arm_cp_reg(cpu, dcpodp_reg);
         }
     }
-#endif /*CONFIG_USER_ONLY*/
 
     /*
      * If full MTE is enabled, add all of the system registers.