From patchwork Mon Aug 31 14:07:26 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juan Quintela X-Patchwork-Id: 32654 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by bilbo.ozlabs.org (Postfix) with ESMTPS id B9EF9B7088 for ; Tue, 1 Sep 2009 00:46:29 +1000 (EST) Received: from localhost ([127.0.0.1]:38307 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mi89D-0003OL-KM for incoming@patchwork.ozlabs.org; Mon, 31 Aug 2009 10:46:19 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Mi7af-0004ud-M2 for qemu-devel@nongnu.org; Mon, 31 Aug 2009 10:10:37 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Mi7aa-0004s3-Fw for qemu-devel@nongnu.org; Mon, 31 Aug 2009 10:10:36 -0400 Received: from [199.232.76.173] (port=43340 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mi7aY-0004rP-PR for qemu-devel@nongnu.org; Mon, 31 Aug 2009 10:10:31 -0400 Received: from mx1.redhat.com ([209.132.183.28]:25924) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Mi7aX-0003GZ-Uj for qemu-devel@nongnu.org; Mon, 31 Aug 2009 10:10:30 -0400 Received: from int-mx04.intmail.prod.int.phx2.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.17]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id n7VEATRe007074; Mon, 31 Aug 2009 10:10:29 -0400 Received: from localhost.localdomain (vpn1-4-222.ams2.redhat.com [10.36.4.222]) by int-mx04.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id n7VEA0oa003480; Mon, 31 Aug 2009 10:10:28 -0400 From: Juan Quintela To: qemu-devel@nongnu.org Date: Mon, 31 Aug 2009 16:07:26 +0200 Message-Id: <8217a025f5b9b5e6a5e57323941836ecf0a71709.1251725416.git.quintela@redhat.com> In-Reply-To: References: In-Reply-To: References: X-Scanned-By: MIMEDefang 2.67 on 10.5.11.17 X-detected-operating-system: by monty-python.gnu.org: Genre and OS details not recognized. Cc: aliguori@us.ibm.com Subject: [Qemu-devel] [PATCH 16/23] cirrus_vga: rename cirrus_hook_write_sr() cirrus_vga_write_sr() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Juan Quintela --- hw/cirrus_vga.c | 45 ++++++++++++++++++++++----------------------- 1 files changed, 22 insertions(+), 23 deletions(-) diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c index d83171a..b369849 100644 --- a/hw/cirrus_vga.c +++ b/hw/cirrus_vga.c @@ -1302,22 +1302,24 @@ static int cirrus_vga_read_sr(CirrusVGAState * s) } } -static int -cirrus_hook_write_sr(CirrusVGAState * s, unsigned reg_index, int reg_value) +static void cirrus_vga_write_sr(CirrusVGAState * s, uint32_t val) { - switch (reg_index) { + switch (s->vga.sr_index) { case 0x00: // Standard VGA case 0x01: // Standard VGA case 0x02: // Standard VGA case 0x03: // Standard VGA case 0x04: // Standard VGA - return CIRRUS_HOOK_NOT_HANDLED; + s->vga.sr[s->vga.sr_index] = val & sr_mask[s->vga.sr_index]; + if (s->vga.sr_index == 1) + s->vga.update_retrace_info(&s->vga); + break; case 0x06: // Unlock Cirrus extensions - reg_value &= 0x17; - if (reg_value == 0x12) { - s->vga.sr[reg_index] = 0x12; + val &= 0x17; + if (val == 0x12) { + s->vga.sr[s->vga.sr_index] = 0x12; } else { - s->vga.sr[reg_index] = 0x0f; + s->vga.sr[s->vga.sr_index] = 0x0f; } break; case 0x10: @@ -1328,8 +1330,8 @@ cirrus_hook_write_sr(CirrusVGAState * s, unsigned reg_index, int reg_value) case 0xb0: case 0xd0: case 0xf0: // Graphics Cursor X - s->vga.sr[0x10] = reg_value; - s->hw_cursor_x = (reg_value << 3) | (reg_index >> 5); + s->vga.sr[0x10] = val; + s->hw_cursor_x = (val << 3) | (s->vga.sr_index >> 5); break; case 0x11: case 0x31: @@ -1339,8 +1341,8 @@ cirrus_hook_write_sr(CirrusVGAState * s, unsigned reg_index, int reg_value) case 0xb1: case 0xd1: case 0xf1: // Graphics Cursor Y - s->vga.sr[0x11] = reg_value; - s->hw_cursor_y = (reg_value << 3) | (reg_index >> 5); + s->vga.sr[0x11] = val; + s->hw_cursor_y = (val << 3) | (s->vga.sr_index >> 5); break; case 0x07: // Extended Sequencer Mode cirrus_update_memory_access(s); @@ -1365,25 +1367,24 @@ cirrus_hook_write_sr(CirrusVGAState * s, unsigned reg_index, int reg_value) case 0x1d: // VCLK 2 Denominator & Post case 0x1e: // VCLK 3 Denominator & Post case 0x1f: // BIOS Write Enable and MCLK select - s->vga.sr[reg_index] = reg_value; + s->vga.sr[s->vga.sr_index] = val; #ifdef DEBUG_CIRRUS printf("cirrus: handled outport sr_index %02x, sr_value %02x\n", - reg_index, reg_value); + s->vga.sr_index, val); #endif break; case 0x17: // Configuration Readback and Extended Control - s->vga.sr[reg_index] = (s->vga.sr[reg_index] & 0x38) | (reg_value & 0xc7); + s->vga.sr[s->vga.sr_index] = (s->vga.sr[s->vga.sr_index] & 0x38) + | (val & 0xc7); cirrus_update_memory_access(s); break; default: #ifdef DEBUG_CIRRUS - printf("cirrus: outport sr_index %02x, sr_value %02x\n", reg_index, - reg_value); + printf("cirrus: outport sr_index %02x, sr_value %02x\n", + s->vga.sr_index, val); #endif break; } - - return CIRRUS_HOOK_HANDLED; } /*************************************** @@ -2806,13 +2807,11 @@ static void cirrus_vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) s->sr_index = val; break; case 0x3c5: - if (cirrus_hook_write_sr(c, s->sr_index, val)) - break; #ifdef DEBUG_VGA_REG printf("vga: write SR%x = 0x%02x\n", s->sr_index, val); #endif - s->sr[s->sr_index] = val & sr_mask[s->sr_index]; - if (s->sr_index == 1) s->update_retrace_info(s); + cirrus_vga_write_sr(c, val); + break; break; case 0x3c6: cirrus_write_hidden_dac(c, val);