From patchwork Fri Oct 19 20:43:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Baron X-Patchwork-Id: 192804 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0C94B2C0090 for ; Sat, 20 Oct 2012 07:46:25 +1100 (EST) Received: from localhost ([::1]:34741 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TPJSZ-0001CA-8w for incoming@patchwork.ozlabs.org; Fri, 19 Oct 2012 16:46:23 -0400 Received: from eggs.gnu.org ([208.118.235.92]:49967) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TPJQ2-000596-T4 for qemu-devel@nongnu.org; Fri, 19 Oct 2012 16:43:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TPJQ1-0006cQ-A3 for qemu-devel@nongnu.org; Fri, 19 Oct 2012 16:43:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58556) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TPJQ0-0006c6-W9 for qemu-devel@nongnu.org; Fri, 19 Oct 2012 16:43:45 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q9JKhgF6011549 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Fri, 19 Oct 2012 16:43:43 -0400 Received: from redhat.com (dhcp-185-114.bos.redhat.com [10.16.185.114]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id q9JKhgqM017153; Fri, 19 Oct 2012 16:43:42 -0400 Date: Fri, 19 Oct 2012 16:43:42 -0400 From: Jason Baron To: qemu-devel@nongnu.org Message-Id: <70586f8d67caec173fb38008c8763bc183e1e685.1350677362.git.jbaron@redhat.com> In-Reply-To: References: X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: aliguori@us.ibm.com, juzhang@redhat.com, mst@redhat.com, jan.kiszka@siemens.com, armbru@redhat.com, agraf@suse.de, blauwirbel@gmail.com, yamahata@valinux.co.jp, alex.williamson@redhat.com, kevin@koconnor.net, avi@redhat.com, mkletzan@redhat.com, pbonzini@redhat.com, lcapitulino@redhat.com, afaerber@suse.de, kraxel@redhat.com Subject: [Qemu-devel] [PATCH v3 26/26] ich9: add support pci assignment X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Jason Baron Fills out support for the pci assignment API. Added: PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin) Add calls to pci_bus_fire_intx_routing_notifier() when routing changes are made. Signed-off-by: Jason Baron --- hw/ich9.h | 1 + hw/lpc_ich9.c | 33 +++++++++++++++++++++++++++++++++ hw/pc_q35.c | 1 + 3 files changed, 35 insertions(+), 0 deletions(-) diff --git a/hw/ich9.h b/hw/ich9.h index 9e19266..cec655a 100644 --- a/hw/ich9.h +++ b/hw/ich9.h @@ -18,6 +18,7 @@ void ich9_lpc_set_irq(void *opaque, int irq_num, int level); int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx); +PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin); void ich9_lpc_pm_init(PCIDevice *pci_lpc, qemu_irq cmos_s3); PCIBus *ich9_d2pbr_init(PCIBus *bus, int devfn, int sec_bus); i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base); diff --git a/hw/lpc_ich9.c b/hw/lpc_ich9.c index a47d7a9..89cbcd4 100644 --- a/hw/lpc_ich9.c +++ b/hw/lpc_ich9.c @@ -173,6 +173,7 @@ static void ich9_cc_write(void *opaque, target_phys_addr_t addr, ich9_cc_addr_len(&addr, &len); memcpy(lpc->chip_config + addr, &val, len); + pci_bus_fire_intx_routing_notifier(lpc->d.bus); ich9_cc_update(lpc); } @@ -301,6 +302,32 @@ int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx) return lpc->irr[PCI_SLOT(pci_dev->devfn)][intx]; } +PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin) +{ + ICH9LPCState *lpc = opaque; + PCIINTxRoute route; + int pic_irq; + int pic_dis; + + assert(0 <= pirq_pin); + assert(pirq_pin < ICH9_LPC_NB_PIRQS); + + route.mode = PCI_INTX_ENABLED; + ich9_lpc_pic_irq(lpc, pirq_pin, &pic_irq, &pic_dis); + if (!pic_dis) { + if (pic_irq < ICH9_LPC_PIC_NUM_PINS) { + route.irq = pic_irq; + } else { + route.mode = PCI_INTX_DISABLED; + route.irq = -1; + } + } else { + route.irq = ich9_pirq_to_gsi(pirq_pin); + } + + return route; +} + static int ich9_lpc_sci_irq(ICH9LPCState *lpc) { switch (lpc->d.config[ICH9_LPC_ACPI_CTRL] & @@ -420,6 +447,12 @@ static void ich9_lpc_config_write(PCIDevice *d, if (ranges_overlap(addr, len, ICH9_LPC_RCBA, 4)) { ich9_lpc_rcba_update(lpc, rbca_old); } + if (ranges_overlap(addr, len, ICH9_LPC_PIRQA_ROUT, 4)) { + pci_bus_fire_intx_routing_notifier(lpc->d.bus); + } + if (ranges_overlap(addr, len, ICH9_LPC_PIRQE_ROUT, 4)) { + pci_bus_fire_intx_routing_notifier(lpc->d.bus); + } } static void ich9_lpc_reset(DeviceState *qdev) diff --git a/hw/pc_q35.c b/hw/pc_q35.c index bde3749..aac56de 100644 --- a/hw/pc_q35.c +++ b/hw/pc_q35.c @@ -112,6 +112,7 @@ static void pc_q35_init_early(qemu_irq *gsi, GSIState *gsi_state, ich9_lpc->ioapic = gsi_state->ioapic_irq; pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc, ICH9_LPC_NB_PIRQS); + pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq); gmps->ram_memory = ram_memory; gmps->pci_address_space = pci_address_space;