Message ID | 53E62ABF.2000104@web.de |
---|---|
State | New |
Headers | show |
09.08.2014 18:05, Jan Kiszka wrote: > From: Jan Kiszka <jan.kiszka@siemens.com> > > IA-32 SDM, Figure 10-14: Bits 27:0 are reserved as 1. > > Fixes Jailhouse hypervisor start with in-kernel irqchips off. Applied to -trivial, thank you! Are the other similar cases in there okay? Say, 0x0d or 0x02 which also uses shifts like this one? /mjt
On 2014-08-13 08:14, Michael Tokarev wrote: > 09.08.2014 18:05, Jan Kiszka wrote: >> From: Jan Kiszka <jan.kiszka@siemens.com> >> >> IA-32 SDM, Figure 10-14: Bits 27:0 are reserved as 1. >> >> Fixes Jailhouse hypervisor start with in-kernel irqchips off. > > Applied to -trivial, thank you! > > Are the other similar cases in there okay? > Say, 0x0d or 0x02 which also uses shifts like this one? Nope, didn't find any. Jan
diff --git a/hw/intc/apic.c b/hw/intc/apic.c index ef19e55..03ff9e9 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -698,7 +698,7 @@ static uint32_t apic_mem_readl(void *opaque, hwaddr addr) val = s->log_dest << 24; break; case 0x0e: - val = s->dest_mode << 28; + val = (s->dest_mode << 28) | 0xfffffff; break; case 0x0f: val = s->spurious_vec;