From patchwork Fri Oct 11 13:03:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Musta X-Patchwork-Id: 282745 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2EA702C00DE for ; Sat, 12 Oct 2013 00:04:54 +1100 (EST) Received: from localhost ([::1]:54250 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VUcOi-00084Q-9a for incoming@patchwork.ozlabs.org; Fri, 11 Oct 2013 09:04:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40295) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VUcOL-00084D-NY for qemu-devel@nongnu.org; Fri, 11 Oct 2013 09:04:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VUcOC-0008TR-V5 for qemu-devel@nongnu.org; Fri, 11 Oct 2013 09:04:29 -0400 Received: from mail-qe0-x22e.google.com ([2607:f8b0:400d:c02::22e]:38007) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VUcNt-0008QY-TR; Fri, 11 Oct 2013 09:04:02 -0400 Received: by mail-qe0-f46.google.com with SMTP id s14so1926725qeb.19 for ; Fri, 11 Oct 2013 06:04:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; bh=CfXZtYKJmfTC+/Z4iqKAq4dmosHMVyFk4xPLaxa3e/g=; b=qXb5fdr25gdIus0eO8AAB08R7knkXyaXORZVEmdOFgG2J/2DXtpfEslxZZS86yLfDU OP0hMM1fzjthct305VHJt/CtvaERxF2xFXQ8lN03FMXZc0Kitm6fdWi6WwV6dparR2xF xHNXo8A7zf5YTwGoq9u7QDSEwLwOXrRjpYO1w1JwMkRU4NWQMeUIRC+qF4sfUg1MX9Kh gQR/Q7DKDD1nh6+b4HVIWFRoU1GDoGsTI5xiR7ap70eF4YHKujmgZl/dcDLeJInGepFe 1OtYB7QGgZlvNX6H0ikNlmtRoiXkIufgecfSBZcRUQxddbp5tebW6ESQe9QAB9aPDYnE v2ig== X-Received: by 10.224.95.70 with SMTP id c6mr2220321qan.61.1381496641312; Fri, 11 Oct 2013 06:04:01 -0700 (PDT) Received: from [9.10.80.13] (rchp4.rochester.ibm.com. [129.42.161.36]) by mx.google.com with ESMTPSA id b10sm2017029qeg.7.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 11 Oct 2013 06:04:00 -0700 (PDT) Message-ID: <5257F73A.2020504@gmail.com> Date: Fri, 11 Oct 2013 08:03:54 -0500 From: Tom Musta User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.0.1 MIME-Version: 1.0 To: qemu-ppc@nongnu.org References: <5257F4DD.7000204@gmail.com> In-Reply-To: <5257F4DD.7000204@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c02::22e Cc: Tom Musta , qemu-devel@nongnu.org Subject: [Qemu-devel] [v2 08/13] Add VSX Vector Move Instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch adds the vector move instructions: - xvabsdp - Vector Absolute Value Double-Precision - xvnabsdp - Vector Negative Absolute Value Double-Precision - xvnegdp - Vector Negate Double-Precision - xvcpsgndp - Vector Copy Sign Double-Precision - xvabssp - Vector Absolute Value Single-Precision - xvnabssp - Vector Negative Absolute Value Single-Precision - xvnegsp - Vector Negate Single-Precision - xvcpsgnsp - Vector Copy Sign Single-Precision Signed-off-by: Tom Musta --- target-ppc/translate.c | 68 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 68 insertions(+), 0 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 36e04b0..03a352d 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7216,6 +7216,66 @@ VSX_SCALAR_MOVE(xsnabsdp, OP_NABS, SGN_MASK_DP) VSX_SCALAR_MOVE(xsnegdp, OP_NEG, SGN_MASK_DP) VSX_SCALAR_MOVE(xscpsgndp, OP_CPSGN, SGN_MASK_DP) +#define VSX_VECTOR_MOVE(name, op, sgn_mask) \ +static void glue(gen_, name)(DisasContext * ctx) \ + { \ + TCGv_i64 xbh, xbl; \ + if (unlikely(!ctx->vsx_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VSXU); \ + return; \ + } \ + xbh = tcg_temp_new(); \ + xbl = tcg_temp_new(); \ + tcg_gen_mov_i64(xbh, cpu_vsrh(xB(ctx->opcode))); \ + tcg_gen_mov_i64(xbl, cpu_vsrl(xB(ctx->opcode))); \ + switch (op) { \ + case OP_ABS: { \ + tcg_gen_andi_i64(xbh, xbh, ~(sgn_mask)); \ + tcg_gen_andi_i64(xbl, xbl, ~(sgn_mask)); \ + break; \ + } \ + case OP_NABS: { \ + tcg_gen_ori_i64(xbh, xbh, (sgn_mask)); \ + tcg_gen_ori_i64(xbl, xbl, (sgn_mask)); \ + break; \ + } \ + case OP_NEG: { \ + tcg_gen_xori_i64(xbh, xbh, (sgn_mask)); \ + tcg_gen_xori_i64(xbl, xbl, (sgn_mask)); \ + break; \ + } \ + case OP_CPSGN: { \ + TCGv_i64 xah = tcg_temp_new(); \ + TCGv_i64 xal = tcg_temp_new(); \ + tcg_gen_mov_i64(xah, cpu_vsrh(xA(ctx->opcode))); \ + tcg_gen_mov_i64(xal, cpu_vsrl(xA(ctx->opcode))); \ + tcg_gen_andi_i64(xah, xah, (sgn_mask)); \ + tcg_gen_andi_i64(xal, xal, (sgn_mask)); \ + tcg_gen_andi_i64(xbh, xbh, ~(sgn_mask)); \ + tcg_gen_andi_i64(xbl, xbl, ~(sgn_mask)); \ + tcg_gen_or_i64(xbh, xbh, xah); \ + tcg_gen_or_i64(xbl, xbl, xal); \ + tcg_temp_free(xah); \ + tcg_temp_free(xal); \ + break; \ + } \ + } \ + tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), xbh); \ + tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), xbl); \ + tcg_temp_free(xbh); \ + tcg_temp_free(xbl); \ + } + +VSX_VECTOR_MOVE(xvabsdp, OP_ABS, SGN_MASK_DP) +VSX_VECTOR_MOVE(xvnabsdp, OP_NABS, SGN_MASK_DP) +VSX_VECTOR_MOVE(xvnegdp, OP_NEG, SGN_MASK_DP) +VSX_VECTOR_MOVE(xvcpsgndp, OP_CPSGN, SGN_MASK_DP) +VSX_VECTOR_MOVE(xvabssp, OP_ABS, SGN_MASK_SP) +VSX_VECTOR_MOVE(xvnabssp, OP_NABS, SGN_MASK_SP) +VSX_VECTOR_MOVE(xvnegsp, OP_NEG, SGN_MASK_SP) +VSX_VECTOR_MOVE(xvcpsgnsp, OP_CPSGN, SGN_MASK_SP) + + /*** SPE extension ***/ /* Register moves */ @@ -9711,6 +9771,14 @@ GEN_XX2FORM(xsnabsdp, 0x12, 0x16, PPC2_VSX), GEN_XX2FORM(xsnegdp, 0x12, 0x17, PPC2_VSX), GEN_XX3FORM(xscpsgndp, 0x00, 0x16, PPC2_VSX), +GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX), +GEN_XX2FORM(xvnabsdp, 0x12, 0x1E, PPC2_VSX), +GEN_XX2FORM(xvnegdp, 0x12, 0x1F, PPC2_VSX), +GEN_XX3FORM(xvcpsgndp, 0x00, 0x1E, PPC2_VSX), +GEN_XX2FORM(xvabssp, 0x12, 0x19, PPC2_VSX), +GEN_XX2FORM(xvnabssp, 0x12, 0x1A, PPC2_VSX), +GEN_XX2FORM(xvnegsp, 0x12, 0x1B, PPC2_VSX), +GEN_XX3FORM(xvcpsgnsp, 0x00, 0x1A, PPC2_VSX), GEN_XX3FORM_DM(xxpermdi, 0x08, 0x01), #undef GEN_SPE