diff mbox

[target-arm,v1,2/2] char/cadence_uart: Add NULL guards against chr

Message ID 481228b7ca6204dc0c4fca4636061118ed90ad9a.1392175904.git.peter.crosthwaite@xilinx.com
State New
Headers show

Commit Message

Peter Crosthwaite Feb. 12, 2014, 3:37 a.m. UTC 
It's possible and valid for users of this device model to instantiate
it without a backing chr device. To avoid crashes, guard all uses of
the backing chr device against NULL.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---

 hw/char/cadence_uart.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

Comments

Peter Maydell Feb. 12, 2014, 7:24 p.m. UTC | #1 
On 12 February 2014 03:37, Peter Crosthwaite
<peter.crosthwaite@xilinx.com> wrote:
> It's possible and valid for users of this device model to instantiate
> it without a backing chr device. To avoid crashes, guard all uses of
> the backing chr device against NULL.
>
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

I guess the other way to approach this would be to require the
backing device and just set it up to be a "throw away output,
never provide input" dummy if there isn't a real one. No idea
if that's feasible though so NULL-guards seems reasonable.

thanks
-- PMM
diff mbox

Patch

diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index 1985047..10abb4d 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -175,8 +175,10 @@  static void uart_send_breaks(UartState *s)
 {
     int break_enabled = 1;
 
-    qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_BREAK,
-                               &break_enabled);
+    if (s->chr) {
+        qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_BREAK,
+                          &break_enabled);
+    }
 }
 
 static void uart_parameters_setup(UartState *s)
@@ -227,7 +229,9 @@  static void uart_parameters_setup(UartState *s)
 
     packet_size += ssp.data_bits + ssp.stop_bits;
     s->char_tx_time = (get_ticks_per_sec() / ssp.speed) * packet_size;
-    qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
+    if (s->chr) {
+        qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
+    }
 }
 
 static int uart_can_receive(void *opaque)
@@ -377,7 +381,9 @@  static void uart_read_rx_fifo(UartState *s, uint32_t *c)
         *c = s->rx_fifo[rx_rpos];
         s->rx_count--;
 
-        qemu_chr_accept_input(s->chr);
+        if (s->chr) {
+            qemu_chr_accept_input(s->chr);
+        }
     } else {
         *c = 0;
     }