diff mbox

[v3,7/8] i.MX: Standardize i.MX EPIT debug

Message ID 33ee0323fb1d0eb0dd2af97a55e7545963979fc5.1445637217.git.jcd@tribudubois.net
State New
Headers show

Commit Message

Jean-Christophe Dubois Oct. 24, 2015, 8:15 p.m. UTC
The goal is to have debug code always compiled during build.

We standardize all debug output on the following format:

[QOM_TYPE_NAME]reporting_function: debug message

We also replace IPRINTF with qemu_log_mask(). The qemu_log_mask() output
is following the same format as the above debug.

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
---

Changes since v1:
 * use HWADDR_PRIx for address formating
 * standardize qemu_log_mask on same model.

Changes since v2:
 * remove intermediate "reg" variable to be on same logic as other files

 hw/timer/imx_epit.c | 48 ++++++++++++++++++++----------------------------
 1 file changed, 20 insertions(+), 28 deletions(-)

Comments

Peter Crosthwaite Oct. 25, 2015, 1:57 a.m. UTC | #1
On Sat, Oct 24, 2015 at 1:15 PM, Jean-Christophe Dubois
<jcd@tribudubois.net> wrote:
> The goal is to have debug code always compiled during build.
>
> We standardize all debug output on the following format:
>
> [QOM_TYPE_NAME]reporting_function: debug message
>
> We also replace IPRINTF with qemu_log_mask(). The qemu_log_mask() output
> is following the same format as the above debug.
>
> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>

Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>

> ---
>
> Changes since v1:
>  * use HWADDR_PRIx for address formating
>  * standardize qemu_log_mask on same model.
>
> Changes since v2:
>  * remove intermediate "reg" variable to be on same logic as other files
>
>  hw/timer/imx_epit.c | 48 ++++++++++++++++++++----------------------------
>  1 file changed, 20 insertions(+), 28 deletions(-)
>
> diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c
> index 9649851..967be4a 100644
> --- a/hw/timer/imx_epit.c
> +++ b/hw/timer/imx_epit.c
> @@ -16,8 +16,17 @@
>  #include "hw/misc/imx_ccm.h"
>  #include "qemu/main-loop.h"
>
> -#define DEBUG_TIMER 0
> -#if DEBUG_TIMER
> +#ifndef DEBUG_IMX_EPIT
> +#define DEBUG_IMX_EPIT 0
> +#endif
> +
> +#define DPRINTF(fmt, args...) \
> +    do { \
> +        if (DEBUG_IMX_EPIT) { \
> +            fprintf(stderr, "[%s]%s: " fmt , TYPE_IMX_EPIT, \
> +                                             __func__, ##args); \
> +        } \
> +    } while (0)
>
>  static char const *imx_epit_reg_name(uint32_t reg)
>  {
> @@ -37,24 +46,6 @@ static char const *imx_epit_reg_name(uint32_t reg)
>      }
>  }
>
> -#  define DPRINTF(fmt, args...) \
> -    do { fprintf(stderr, "%s: " fmt , __func__, ##args); } while (0)
> -#else
> -#  define DPRINTF(fmt, args...) do {} while (0)
> -#endif
> -
> -/*
> - * Define to 1 for messages about attempts to
> - * access unimplemented registers or similar.
> - */
> -#define DEBUG_IMPLEMENTATION 1
> -#if DEBUG_IMPLEMENTATION
> -#  define IPRINTF(fmt, args...) \
> -          do { fprintf(stderr, "%s: " fmt, __func__, ##args); } while (0)
> -#else
> -#  define IPRINTF(fmt, args...) do {} while (0)
> -#endif
> -
>  /*
>   * Exact clock frequencies vary from board to board.
>   * These are typical.
> @@ -136,9 +127,8 @@ static uint64_t imx_epit_read(void *opaque, hwaddr offset, unsigned size)
>  {
>      IMXEPITState *s = IMX_EPIT(opaque);
>      uint32_t reg_value = 0;
> -    uint32_t reg = offset >> 2;
>
> -    switch (reg) {
> +    switch (offset >> 2) {
>      case 0: /* Control Register */
>          reg_value = s->cr;
>          break;
> @@ -161,11 +151,12 @@ static uint64_t imx_epit_read(void *opaque, hwaddr offset, unsigned size)
>          break;
>
>      default:
> -        IPRINTF("Bad offset %x\n", reg);
> +        qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
> +                      HWADDR_PRIx "\n", TYPE_IMX_EPIT, __func__, offset);
>          break;
>      }
>
> -    DPRINTF("(%s) = 0x%08x\n", imx_epit_reg_name(reg), reg_value);
> +    DPRINTF("(%s) = 0x%08x\n", imx_epit_reg_name(offset >> 2), reg_value);
>
>      return reg_value;
>  }
> @@ -190,12 +181,12 @@ static void imx_epit_write(void *opaque, hwaddr offset, uint64_t value,
>                             unsigned size)
>  {
>      IMXEPITState *s = IMX_EPIT(opaque);
> -    uint32_t reg = offset >> 2;
>      uint64_t oldcr;
>
> -    DPRINTF("(%s, value = 0x%08x)\n", imx_epit_reg_name(reg), (uint32_t)value);
> +    DPRINTF("(%s, value = 0x%08x)\n", imx_epit_reg_name(offset >> 2),
> +            (uint32_t)value);
>
> -    switch (reg) {
> +    switch (offset >> 2) {
>      case 0: /* CR */
>
>          oldcr = s->cr;
> @@ -271,7 +262,8 @@ static void imx_epit_write(void *opaque, hwaddr offset, uint64_t value,
>          break;
>
>      default:
> -        IPRINTF("Bad offset %x\n", reg);
> +        qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
> +                      HWADDR_PRIx "\n", TYPE_IMX_EPIT, __func__, offset);
>
>          break;
>      }
> --
> 2.5.0
>
diff mbox

Patch

diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c
index 9649851..967be4a 100644
--- a/hw/timer/imx_epit.c
+++ b/hw/timer/imx_epit.c
@@ -16,8 +16,17 @@ 
 #include "hw/misc/imx_ccm.h"
 #include "qemu/main-loop.h"
 
-#define DEBUG_TIMER 0
-#if DEBUG_TIMER
+#ifndef DEBUG_IMX_EPIT
+#define DEBUG_IMX_EPIT 0
+#endif
+
+#define DPRINTF(fmt, args...) \
+    do { \
+        if (DEBUG_IMX_EPIT) { \
+            fprintf(stderr, "[%s]%s: " fmt , TYPE_IMX_EPIT, \
+                                             __func__, ##args); \
+        } \
+    } while (0)
 
 static char const *imx_epit_reg_name(uint32_t reg)
 {
@@ -37,24 +46,6 @@  static char const *imx_epit_reg_name(uint32_t reg)
     }
 }
 
-#  define DPRINTF(fmt, args...) \
-    do { fprintf(stderr, "%s: " fmt , __func__, ##args); } while (0)
-#else
-#  define DPRINTF(fmt, args...) do {} while (0)
-#endif
-
-/*
- * Define to 1 for messages about attempts to
- * access unimplemented registers or similar.
- */
-#define DEBUG_IMPLEMENTATION 1
-#if DEBUG_IMPLEMENTATION
-#  define IPRINTF(fmt, args...) \
-          do { fprintf(stderr, "%s: " fmt, __func__, ##args); } while (0)
-#else
-#  define IPRINTF(fmt, args...) do {} while (0)
-#endif
-
 /*
  * Exact clock frequencies vary from board to board.
  * These are typical.
@@ -136,9 +127,8 @@  static uint64_t imx_epit_read(void *opaque, hwaddr offset, unsigned size)
 {
     IMXEPITState *s = IMX_EPIT(opaque);
     uint32_t reg_value = 0;
-    uint32_t reg = offset >> 2;
 
-    switch (reg) {
+    switch (offset >> 2) {
     case 0: /* Control Register */
         reg_value = s->cr;
         break;
@@ -161,11 +151,12 @@  static uint64_t imx_epit_read(void *opaque, hwaddr offset, unsigned size)
         break;
 
     default:
-        IPRINTF("Bad offset %x\n", reg);
+        qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
+                      HWADDR_PRIx "\n", TYPE_IMX_EPIT, __func__, offset);
         break;
     }
 
-    DPRINTF("(%s) = 0x%08x\n", imx_epit_reg_name(reg), reg_value);
+    DPRINTF("(%s) = 0x%08x\n", imx_epit_reg_name(offset >> 2), reg_value);
 
     return reg_value;
 }
@@ -190,12 +181,12 @@  static void imx_epit_write(void *opaque, hwaddr offset, uint64_t value,
                            unsigned size)
 {
     IMXEPITState *s = IMX_EPIT(opaque);
-    uint32_t reg = offset >> 2;
     uint64_t oldcr;
 
-    DPRINTF("(%s, value = 0x%08x)\n", imx_epit_reg_name(reg), (uint32_t)value);
+    DPRINTF("(%s, value = 0x%08x)\n", imx_epit_reg_name(offset >> 2),
+            (uint32_t)value);
 
-    switch (reg) {
+    switch (offset >> 2) {
     case 0: /* CR */
 
         oldcr = s->cr;
@@ -271,7 +262,8 @@  static void imx_epit_write(void *opaque, hwaddr offset, uint64_t value,
         break;
 
     default:
-        IPRINTF("Bad offset %x\n", reg);
+        qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
+                      HWADDR_PRIx "\n", TYPE_IMX_EPIT, __func__, offset);
 
         break;
     }