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[2/3] target-arm: correct cp15 c1_sys reset value for cortex-a8

Message ID 2a9faddaab040e9b1655eccf5799ee67833e94ca.1291703787.git.juha.riihimaki@nokia.com
State New
Headers show

Commit Message

Juha.Riihimaki@nokia.com Dec. 8, 2010, 11:15 a.m. UTC 
From: Mattias Holm <holm@liacs.nl>

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
---
 target-arm/helper.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
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Patch

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 5bcfcf7..7cd6a4e 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -109,6 +109,7 @@  static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         env->cp15.c0_ccsid[0] = 0xe007e01a; /* 16k L1 dcache. */
         env->cp15.c0_ccsid[1] = 0x2007e01a; /* 16k L1 icache. */
         env->cp15.c0_ccsid[2] = 0xf0000000; /* No L2 icache. */
+        env->cp15.c1_sys = 0x00c50078;
         break;
     case ARM_CPUID_CORTEXA9:
         set_feature(env, ARM_FEATURE_V6);