@@ -212,8 +212,10 @@ void helper_sdr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
static const int multiple_regs[] = { 16, 17, 18, 19, 20, 21, 22, 23, 30 };
void helper_lwm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
- uint32_t mem_idx)
+ uint32_t memop_idx)
{
+ MemOpIdx oi = memop_idx;
+ unsigned mem_idx = get_mmuidx(oi);
target_ulong base_reglist = reglist & 0xf;
target_ulong do_r31 = reglist & 0x10;
@@ -234,8 +236,10 @@ void helper_lwm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
}
void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
- uint32_t mem_idx)
+ uint32_t memop_idx)
{
+ MemOpIdx oi = memop_idx;
+ unsigned mem_idx = get_mmuidx(oi);
target_ulong base_reglist = reglist & 0xf;
target_ulong do_r31 = reglist & 0x10;
@@ -256,8 +260,10 @@ void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
#if defined(TARGET_MIPS64)
void helper_ldm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
- uint32_t mem_idx)
+ uint32_t memop_idx)
{
+ MemOpIdx oi = memop_idx;
+ unsigned mem_idx = get_mmuidx(oi);
target_ulong base_reglist = reglist & 0xf;
target_ulong do_r31 = reglist & 0x10;
@@ -278,8 +284,10 @@ void helper_ldm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
}
void helper_sdm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
- uint32_t mem_idx)
+ uint32_t memop_idx)
{
+ MemOpIdx oi = memop_idx;
+ unsigned mem_idx = get_mmuidx(oi);
target_ulong base_reglist = reglist & 0xf;
target_ulong do_r31 = reglist & 0x10;
@@ -693,7 +693,8 @@ static void gen_ldst_multiple(DisasContext *ctx, uint32_t opc, int reglist,
int base, int16_t offset)
{
TCGv t0, t1;
- TCGv_i32 t2;
+ MemOp mop = MO_UNALN;
+ MemOpIdx oi;
if (ctx->hflags & MIPS_HFLAG_BMASK) {
gen_reserved_instruction(ctx);
@@ -705,22 +706,25 @@ static void gen_ldst_multiple(DisasContext *ctx, uint32_t opc, int reglist,
gen_base_offset_addr(ctx, t0, base, offset);
t1 = tcg_constant_tl(reglist);
- t2 = tcg_constant_i32(ctx->mem_idx);
save_cpu_state(ctx, 1);
switch (opc) {
case LWM32:
- gen_helper_lwm(tcg_env, t0, t1, t2);
+ oi = make_memop_idx(mop | MO_UL, ctx->mem_idx);
+ gen_helper_lwm(tcg_env, t0, t1, tcg_constant_i32(oi));
break;
case SWM32:
- gen_helper_swm(tcg_env, t0, t1, t2);
+ oi = make_memop_idx(mop | MO_UL, ctx->mem_idx);
+ gen_helper_swm(tcg_env, t0, t1, tcg_constant_i32(oi));
break;
#ifdef TARGET_MIPS64
case LDM:
- gen_helper_ldm(tcg_env, t0, t1, t2);
+ oi = make_memop_idx(mop | MO_UQ, ctx->mem_idx);
+ gen_helper_ldm(tcg_env, t0, t1, tcg_constant_i32(oi));
break;
case SDM:
- gen_helper_sdm(tcg_env, t0, t1, t2);
+ oi = make_memop_idx(mop | MO_UQ, ctx->mem_idx);
+ gen_helper_sdm(tcg_env, t0, t1, tcg_constant_i32(oi));
break;
#endif
}