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qemu/osdep: align memory allocations to 2M on RISC-V

Message ID 20250924131803656Yqt9ZJKfevWkInaGppFdE@zte.com.cn
State New
Headers show
Series qemu/osdep: align memory allocations to 2M on RISC-V | expand

Commit Message

liu.xuemei1@zte.com.cn Sept. 24, 2025, 5:18 a.m. UTC 
From: Xuemei Liu <liu.xuemei1@zte.com.cn>

Similar to other architectures (e.g., x86_64, aarch64), utilizing THP on RISC-V
KVM requires 2MiB-aligned memory blocks.

Signed-off-by: Xuemei Liu <liu.xuemei1@zte.com.cn>
---
 include/qemu/osdep.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

David Hildenbrand Sept. 24, 2025, 9:28 a.m. UTC | #1 
On 24.09.25 07:18, liu.xuemei1@zte.com.cn wrote:
> From: Xuemei Liu <liu.xuemei1@zte.com.cn>
> 
> Similar to other architectures (e.g., x86_64, aarch64), utilizing THP on RISC-V
> KVM requires 2MiB-aligned memory blocks.
> 
> Signed-off-by: Xuemei Liu <liu.xuemei1@zte.com.cn>
> ---
>   include/qemu/osdep.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
> index 1b38cb7e45..6de6c0c4e5 100644
> --- a/include/qemu/osdep.h
> +++ b/include/qemu/osdep.h
> @@ -561,7 +561,7 @@ int madvise(char *, size_t, int);
> 
>   #if defined(__linux__) && \
>       (defined(__x86_64__) || defined(__arm__) || defined(__aarch64__) \
> -     || defined(__powerpc64__))
> +     || defined(__powerpc64__) || defined(__riscv))
>      /* Use 2 MiB alignment so transparent hugepages can be used by KVM.
>         Valgrind does not support alignments larger than 1 MiB,
>         therefore we need special code which handles running on Valgrind. */

Reviewed-by: David Hildenbrand <david@redhat.com>
Alistair Francis Sept. 29, 2025, 12:25 a.m. UTC | #2 
On Wed, Sep 24, 2025 at 3:20 PM <liu.xuemei1@zte.com.cn> wrote:
>
> From: Xuemei Liu <liu.xuemei1@zte.com.cn>
>
> Similar to other architectures (e.g., x86_64, aarch64), utilizing THP on RISC-V
> KVM requires 2MiB-aligned memory blocks.
>
> Signed-off-by: Xuemei Liu <liu.xuemei1@zte.com.cn>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>  include/qemu/osdep.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
> index 1b38cb7e45..6de6c0c4e5 100644
> --- a/include/qemu/osdep.h
> +++ b/include/qemu/osdep.h
> @@ -561,7 +561,7 @@ int madvise(char *, size_t, int);
>
>  #if defined(__linux__) && \
>      (defined(__x86_64__) || defined(__arm__) || defined(__aarch64__) \
> -     || defined(__powerpc64__))
> +     || defined(__powerpc64__) || defined(__riscv))
>     /* Use 2 MiB alignment so transparent hugepages can be used by KVM.
>        Valgrind does not support alignments larger than 1 MiB,
>        therefore we need special code which handles running on Valgrind. */
> --
> 2.27.0
>
diff mbox series

Patch

diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 1b38cb7e45..6de6c0c4e5 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -561,7 +561,7 @@  int madvise(char *, size_t, int);

 #if defined(__linux__) && \
     (defined(__x86_64__) || defined(__arm__) || defined(__aarch64__) \
-     || defined(__powerpc64__))
+     || defined(__powerpc64__) || defined(__riscv))
    /* Use 2 MiB alignment so transparent hugepages can be used by KVM.
       Valgrind does not support alignments larger than 1 MiB,
       therefore we need special code which handles running on Valgrind. */