| Message ID | 20231128235700.599584-5-ninad@linux.ibm.com |
|---|---|
| State | New |
| Headers | show |
| Series | Introduce model for IBM's FSI | expand |
On 11/29/23 00:56, Ninad Palsule wrote: > This is a part of patchset where IBM's Flexible Service Interface is > introduced. > > The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in > POWER processors. This now makes an appearance in the ASPEED SoC due > to tight integration of the FSI master IP with the OPB, mainly the > existence of an MMIO-mapping of the CFAM address straight onto a > sub-region of the OPB address space. > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> > Reviewed-by: Joel Stanley <joel@jms.id.au> > [ clg: - removed FSIMasterState object and fsi_opb_realize() > - simplified OPBus ] > Signed-off-by: Cédric Le Goater <clg@kaod.org> > --- > include/hw/fsi/opb.h | 25 +++++++++++++++++++++++++ > hw/fsi/opb.c | 36 ++++++++++++++++++++++++++++++++++++ > hw/fsi/Kconfig | 4 ++++ > hw/fsi/meson.build | 1 + > 4 files changed, 66 insertions(+) > create mode 100644 include/hw/fsi/opb.h > create mode 100644 hw/fsi/opb.c > > diff --git a/include/hw/fsi/opb.h b/include/hw/fsi/opb.h > new file mode 100644 > index 0000000000..c112206f9e > --- /dev/null > +++ b/include/hw/fsi/opb.h > @@ -0,0 +1,25 @@ > +/* > + * SPDX-License-Identifier: GPL-2.0-or-later > + * Copyright (C) 2023 IBM Corp. > + * > + * IBM On-Chip Peripheral Bus > + */ > +#ifndef FSI_OPB_H > +#define FSI_OPB_H > + > +#include "exec/memory.h" > +#include "hw/fsi/fsi-master.h" > + > +#define TYPE_OP_BUS "opb" > +OBJECT_DECLARE_SIMPLE_TYPE(OPBus, OP_BUS) > + > +typedef struct OPBus { > + /*< private >*/ > + BusState bus; > + > + /*< public >*/ > + MemoryRegion mr; > + AddressSpace as; > +} OPBus; > + > +#endif /* FSI_OPB_H */ > diff --git a/hw/fsi/opb.c b/hw/fsi/opb.c > new file mode 100644 > index 0000000000..6474754890 > --- /dev/null > +++ b/hw/fsi/opb.c > @@ -0,0 +1,36 @@ > +/* > + * SPDX-License-Identifier: GPL-2.0-or-later > + * Copyright (C) 2023 IBM Corp. > + * > + * IBM On-chip Peripheral Bus > + */ > + > +#include "qemu/osdep.h" > + > +#include "qapi/error.h" > +#include "qemu/log.h" > + > +#include "hw/fsi/opb.h" > + > +static void fsi_opb_init(Object *o) > +{ > + OPBus *opb = OP_BUS(o); > + > + memory_region_init_io(&opb->mr, OBJECT(opb), NULL, opb, > + NULL, UINT32_MAX); Let's give the region some name. Thanks, C. > + address_space_init(&opb->as, &opb->mr, "opb"); > +} > + > +static const TypeInfo opb_info = { > + .name = TYPE_OP_BUS, > + .parent = TYPE_BUS, > + .instance_init = fsi_opb_init, > + .instance_size = sizeof(OPBus), > +}; > + > +static void fsi_opb_register_types(void) > +{ > + type_register_static(&opb_info); > +} > + > +type_init(fsi_opb_register_types); > diff --git a/hw/fsi/Kconfig b/hw/fsi/Kconfig > index de1594a335..9755baa8cc 100644 > --- a/hw/fsi/Kconfig > +++ b/hw/fsi/Kconfig > @@ -1,3 +1,7 @@ > +config FSI_OPB > + bool > + select FSI_CFAM > + > config FSI_CFAM > bool > select FSI > diff --git a/hw/fsi/meson.build b/hw/fsi/meson.build > index cafd009c6d..ba92881370 100644 > --- a/hw/fsi/meson.build > +++ b/hw/fsi/meson.build > @@ -1,3 +1,4 @@ > system_ss.add(when: 'CONFIG_FSI_LBUS', if_true: files('lbus.c')) > system_ss.add(when: 'CONFIG_FSI_CFAM', if_true: files('cfam.c')) > system_ss.add(when: 'CONFIG_FSI', if_true: files('fsi.c','fsi-slave.c')) > +system_ss.add(when: 'CONFIG_FSI_OPB', if_true: files('opb.c'))
Hello Cedric, On 12/12/23 08:48, Cédric Le Goater wrote: > On 11/29/23 00:56, Ninad Palsule wrote: >> This is a part of patchset where IBM's Flexible Service Interface is >> introduced. >> >> The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in >> POWER processors. This now makes an appearance in the ASPEED SoC due >> to tight integration of the FSI master IP with the OPB, mainly the >> existence of an MMIO-mapping of the CFAM address straight onto a >> sub-region of the OPB address space. >> >> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> >> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> >> Reviewed-by: Joel Stanley <joel@jms.id.au> >> [ clg: - removed FSIMasterState object and fsi_opb_realize() >> - simplified OPBus ] >> Signed-off-by: Cédric Le Goater <clg@kaod.org> >> --- >> include/hw/fsi/opb.h | 25 +++++++++++++++++++++++++ >> hw/fsi/opb.c | 36 ++++++++++++++++++++++++++++++++++++ >> hw/fsi/Kconfig | 4 ++++ >> hw/fsi/meson.build | 1 + >> 4 files changed, 66 insertions(+) >> create mode 100644 include/hw/fsi/opb.h >> create mode 100644 hw/fsi/opb.c >> >> diff --git a/include/hw/fsi/opb.h b/include/hw/fsi/opb.h >> new file mode 100644 >> index 0000000000..c112206f9e >> --- /dev/null >> +++ b/include/hw/fsi/opb.h >> @@ -0,0 +1,25 @@ >> +/* >> + * SPDX-License-Identifier: GPL-2.0-or-later >> + * Copyright (C) 2023 IBM Corp. >> + * >> + * IBM On-Chip Peripheral Bus >> + */ >> +#ifndef FSI_OPB_H >> +#define FSI_OPB_H >> + >> +#include "exec/memory.h" >> +#include "hw/fsi/fsi-master.h" >> + >> +#define TYPE_OP_BUS "opb" >> +OBJECT_DECLARE_SIMPLE_TYPE(OPBus, OP_BUS) >> + >> +typedef struct OPBus { >> + /*< private >*/ >> + BusState bus; >> + >> + /*< public >*/ >> + MemoryRegion mr; >> + AddressSpace as; >> +} OPBus; >> + >> +#endif /* FSI_OPB_H */ >> diff --git a/hw/fsi/opb.c b/hw/fsi/opb.c >> new file mode 100644 >> index 0000000000..6474754890 >> --- /dev/null >> +++ b/hw/fsi/opb.c >> @@ -0,0 +1,36 @@ >> +/* >> + * SPDX-License-Identifier: GPL-2.0-or-later >> + * Copyright (C) 2023 IBM Corp. >> + * >> + * IBM On-chip Peripheral Bus >> + */ >> + >> +#include "qemu/osdep.h" >> + >> +#include "qapi/error.h" >> +#include "qemu/log.h" >> + >> +#include "hw/fsi/opb.h" >> + >> +static void fsi_opb_init(Object *o) >> +{ >> + OPBus *opb = OP_BUS(o); >> + >> + memory_region_init_io(&opb->mr, OBJECT(opb), NULL, opb, >> + NULL, UINT32_MAX); > > Let's give the region some name. Added "fsi.opb" name. Thanks for the review. Regards, Ninad
diff --git a/include/hw/fsi/opb.h b/include/hw/fsi/opb.h new file mode 100644 index 0000000000..c112206f9e --- /dev/null +++ b/include/hw/fsi/opb.h @@ -0,0 +1,25 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Copyright (C) 2023 IBM Corp. + * + * IBM On-Chip Peripheral Bus + */ +#ifndef FSI_OPB_H +#define FSI_OPB_H + +#include "exec/memory.h" +#include "hw/fsi/fsi-master.h" + +#define TYPE_OP_BUS "opb" +OBJECT_DECLARE_SIMPLE_TYPE(OPBus, OP_BUS) + +typedef struct OPBus { + /*< private >*/ + BusState bus; + + /*< public >*/ + MemoryRegion mr; + AddressSpace as; +} OPBus; + +#endif /* FSI_OPB_H */ diff --git a/hw/fsi/opb.c b/hw/fsi/opb.c new file mode 100644 index 0000000000..6474754890 --- /dev/null +++ b/hw/fsi/opb.c @@ -0,0 +1,36 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Copyright (C) 2023 IBM Corp. + * + * IBM On-chip Peripheral Bus + */ + +#include "qemu/osdep.h" + +#include "qapi/error.h" +#include "qemu/log.h" + +#include "hw/fsi/opb.h" + +static void fsi_opb_init(Object *o) +{ + OPBus *opb = OP_BUS(o); + + memory_region_init_io(&opb->mr, OBJECT(opb), NULL, opb, + NULL, UINT32_MAX); + address_space_init(&opb->as, &opb->mr, "opb"); +} + +static const TypeInfo opb_info = { + .name = TYPE_OP_BUS, + .parent = TYPE_BUS, + .instance_init = fsi_opb_init, + .instance_size = sizeof(OPBus), +}; + +static void fsi_opb_register_types(void) +{ + type_register_static(&opb_info); +} + +type_init(fsi_opb_register_types); diff --git a/hw/fsi/Kconfig b/hw/fsi/Kconfig index de1594a335..9755baa8cc 100644 --- a/hw/fsi/Kconfig +++ b/hw/fsi/Kconfig @@ -1,3 +1,7 @@ +config FSI_OPB + bool + select FSI_CFAM + config FSI_CFAM bool select FSI diff --git a/hw/fsi/meson.build b/hw/fsi/meson.build index cafd009c6d..ba92881370 100644 --- a/hw/fsi/meson.build +++ b/hw/fsi/meson.build @@ -1,3 +1,4 @@ system_ss.add(when: 'CONFIG_FSI_LBUS', if_true: files('lbus.c')) system_ss.add(when: 'CONFIG_FSI_CFAM', if_true: files('cfam.c')) system_ss.add(when: 'CONFIG_FSI', if_true: files('fsi.c','fsi-slave.c')) +system_ss.add(when: 'CONFIG_FSI_OPB', if_true: files('opb.c'))