| Message ID | 20231124064001.198572-2-npiggin@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | ppc: pnv ChipTOD and various timebase fixes | expand |
On 11/24/23 07:39, Nicholas Piggin wrote: > From the earliest PowerPC ISA, TBR (later SPR) 268 has been called TB > and accessed with mftb instruction. The problem is that TB is the name > of the 64-bit register, and 32-bit implementations can only read the > lower half with one instruction, so 268 has also been called TBL and > it does only read TBL on 32-bit. > > Change SPR 268 to be called TB on 64-bit implementations. > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Thanks, C. > --- > target/ppc/helper_regs.c | 4 ++++ > target/ppc/ppc-qmp-cmds.c | 4 ++++ > 2 files changed, 8 insertions(+) > > diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c > index f380342d4d..8c00ed8c06 100644 > --- a/target/ppc/helper_regs.c > +++ b/target/ppc/helper_regs.c > @@ -460,7 +460,11 @@ void register_generic_sprs(PowerPCCPU *cpu) > } > > /* Time base */ > +#if defined(TARGET_PPC64) > + spr_register(env, SPR_VTBL, "TB", > +#else > spr_register(env, SPR_VTBL, "TBL", > +#endif > &spr_read_tbl, SPR_NOACCESS, > &spr_read_tbl, SPR_NOACCESS, > 0x00000000); > diff --git a/target/ppc/ppc-qmp-cmds.c b/target/ppc/ppc-qmp-cmds.c > index f9acc21056..ffaff59e78 100644 > --- a/target/ppc/ppc-qmp-cmds.c > +++ b/target/ppc/ppc-qmp-cmds.c > @@ -103,7 +103,11 @@ const MonitorDef monitor_defs[] = { > { "xer", 0, &monitor_get_xer }, > { "msr", offsetof(CPUPPCState, msr) }, > { "tbu", 0, &monitor_get_tbu, }, > +#if defined(TARGET_PPC64) > + { "tb", 0, &monitor_get_tbl, }, > +#else > { "tbl", 0, &monitor_get_tbl, }, > +#endif > { NULL }, > }; >
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index f380342d4d..8c00ed8c06 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -460,7 +460,11 @@ void register_generic_sprs(PowerPCCPU *cpu) } /* Time base */ +#if defined(TARGET_PPC64) + spr_register(env, SPR_VTBL, "TB", +#else spr_register(env, SPR_VTBL, "TBL", +#endif &spr_read_tbl, SPR_NOACCESS, &spr_read_tbl, SPR_NOACCESS, 0x00000000); diff --git a/target/ppc/ppc-qmp-cmds.c b/target/ppc/ppc-qmp-cmds.c index f9acc21056..ffaff59e78 100644 --- a/target/ppc/ppc-qmp-cmds.c +++ b/target/ppc/ppc-qmp-cmds.c @@ -103,7 +103,11 @@ const MonitorDef monitor_defs[] = { { "xer", 0, &monitor_get_xer }, { "msr", offsetof(CPUPPCState, msr) }, { "tbu", 0, &monitor_get_tbu, }, +#if defined(TARGET_PPC64) + { "tb", 0, &monitor_get_tbl, }, +#else { "tbl", 0, &monitor_get_tbl, }, +#endif { NULL }, };
From the earliest PowerPC ISA, TBR (later SPR) 268 has been called TB and accessed with mftb instruction. The problem is that TB is the name of the 64-bit register, and 32-bit implementations can only read the lower half with one instruction, so 268 has also been called TBL and it does only read TBL on 32-bit. Change SPR 268 to be called TB on 64-bit implementations. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- target/ppc/helper_regs.c | 4 ++++ target/ppc/ppc-qmp-cmds.c | 4 ++++ 2 files changed, 8 insertions(+)