[PULL,39/52] target/arm: Tidy helpers for translation

Message ID	20230605201548.1596865-40-richard.henderson@linaro.org
State	New
Headers	show Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org> Subject: [PULL 39/52] target/arm: Tidy helpers for translation Date: Mon, 5 Jun 2023 13:15:35 -0700 Message-Id: <20230605201548.1596865-40-richard.henderson@linaro.org> In-Reply-To: <20230605201548.1596865-1-richard.henderson@linaro.org> References: <20230605201548.1596865-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org
Series	[PULL,01/52] tcg/ppc: Remove TARGET_LONG_BITS, TCG_TYPE_TL \| expand [PULL,01/52] tcg/ppc: Remove TARGET_LONG_BITS, TCG_TYPE_TL [PULL,02/52] tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL [PULL,03/52] tcg/s390x: Remove TARGET_LONG_BITS, TCG_TYPE_TL [PULL,04/52] tcg/sparc64: Remove TARGET_LONG_BITS, TCG_TYPE_TL [PULL,05/52] tcg: Move TCG_TYPE_TL from tcg.h to tcg-op.h [PULL,06/52] tcg: Widen CPUTLBEntry comparators to 64-bits [PULL,07/52] tcg: Add tlb_fast_offset to TCGContext [PULL,08/52] target/avr: Add missing includes of qemu/error-report.h [PULL,09/52] target/: Add missing includes of tcg/debug-assert.h [PULL,10/52] : Add missing includes of tcg/tcg.h [PULL,11/52] tcg: Split out tcg-target-reg-bits.h [PULL,12/52] target/arm: Fix test of TCG_OVERSIZED_GUEST [PULL,13/52] tcg: Split out tcg/oversized-guest.h [PULL,14/52] tcg: Move TCGv, dup_const_tl definitions to tcg-op.h [PULL,15/52] tcg: Split tcg/tcg-op-common.h from tcg/tcg-op.h [PULL,16/52] target/arm: Include helper-gen.h in translator.h [PULL,17/52] target/hexagon: Include helper-gen.h where needed [PULL,18/52] tcg: Remove outdated comments in helper-head.h [PULL,19/52] tcg: Move TCGHelperInfo and dependencies to tcg/helper-info.h [PULL,20/52] tcg: Pass TCGHelperInfo to tcg_gen_callN [PULL,21/52] tcg: Move temp_idx and tcgv_i32_temp debug out of line [PULL,22/52] tcg: Split tcg_gen_callN [PULL,23/52] tcg: Split helper-gen.h [PULL,24/52] tcg: Split helper-proto.h [PULL,25/52] target/sh4: Emit insn_start for each insn in gUSA region [PULL,26/52] tcg: Add insn_start_words to TCGContext [PULL,27/52] tcg: Add guest_mo to TCGContext [PULL,28/52] tcg: Move TLB_FLAGS_MASK check out of get_alignment_bits [PULL,29/52] tcg: Split tcg/tcg-op-gvec.h [PULL,30/52] tcg: Remove NO_CPU_IO_DEFS [PULL,31/52] exec-all: Widen tb_page_addr_t for user-only [PULL,32/52] exec-all: Widen TranslationBlock pc and cs_base to 64-bits [PULL,33/52] tcg: Spit out exec/translation-block.h [PULL,34/52] include/exec: Remove CODE_GEN_AVG_BLOCK_SIZE [PULL,35/52] accel/tcg: Move most of gen-icount.h into translator.c [PULL,36/52] accel/tcg: Introduce translator_io_start [PULL,37/52] target/ppc: Inline gen_icount_io_start() [PULL,38/52] accel/tcg: Move translator_fake_ldb out of line [PULL,39/52] target/arm: Tidy helpers for translation [PULL,40/52] target/mips: Tidy helpers for translation [PULL,41/52] target/*: Add missing includes of exec/translation-block.h [PULL,42/52] target/arm: Add missing include of exec/exec-all.h [PULL,43/52] accel/tcg: Tidy includes for translator.[ch] [PULL,44/52] tcg: Fix PAGE/PROT confusion [PULL,45/52] tcg: Move env defines out of NEED_CPU_H in helper-head.h [PULL,46/52] tcg: Remove target-specific headers from tcg.[ch] [PULL,47/52] plugins: Move plugin_insn_append to translator.c [PULL,48/52] plugins: Drop unused headers from exec/plugin-gen.h [PULL,49/52] exec/poison: Do not poison CONFIG_SOFTMMU [PULL,50/52] tcg: Build once for system and once for user-only [PULL,51/52] accel/tcg: Unmap perf_marker [PULL,52/52] tcg/tcg-op-vec: Remove left over _link_error() definitions

Message ID

20230605201548.1596865-40-richard.henderson@linaro.org

State

New

Headers

From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PULL 39/52] target/arm: Tidy helpers for translation
Date: Mon,  5 Jun 2023 13:15:35 -0700
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Series

[PULL,01/52] tcg/ppc: Remove TARGET_LONG_BITS, TCG_TYPE_TL | expand

Commit Message

Richard Henderson June 5, 2023, 8:15 p.m. UTC

Move most includes from *translate*.c to translate.h, ensuring
that we get the ordering correct.  Ensure cpu.h is first.
Use disas/disas.h instead of exec/log.h.
Drop otherwise unused includes.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/tcg/translate.h        |  3 +++
 target/arm/tcg/translate-a64.c    | 17 +++++------------
 target/arm/tcg/translate-m-nocp.c |  2 --
 target/arm/tcg/translate-mve.c    |  3 ---
 target/arm/tcg/translate-neon.c   |  3 ---
 target/arm/tcg/translate-sme.c    |  6 ------
 target/arm/tcg/translate-sve.c    |  9 ---------
 target/arm/tcg/translate-vfp.c    |  3 ---
 target/arm/tcg/translate.c        | 17 +++++------------
 9 files changed, 13 insertions(+), 50 deletions(-)

diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h
index 868a3abd0d..5b53b6215d 100644
--- a/target/arm/tcg/translate.h
+++ b/target/arm/tcg/translate.h
@@ -1,6 +1,9 @@ 
 #ifndef TARGET_ARM_TRANSLATE_H
 #define TARGET_ARM_TRANSLATE_H
 
+#include "cpu.h"
+#include "tcg/tcg-op.h"
+#include "tcg/tcg-op-gvec.h"
 #include "exec/translator.h"
 #include "exec/helper-gen.h"
 #include "internals.h"
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 8d45dbf8fc..d9800337cf 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -18,20 +18,13 @@ 
  */
 #include "qemu/osdep.h"
 
-#include "cpu.h"
-#include "exec/exec-all.h"
-#include "tcg/tcg-op.h"
-#include "tcg/tcg-op-gvec.h"
-#include "qemu/log.h"
-#include "arm_ldst.h"
 #include "translate.h"
-#include "internals.h"
-#include "qemu/host-utils.h"
-#include "semihosting/semihost.h"
-#include "exec/log.h"
-#include "cpregs.h"
 #include "translate-a64.h"
-#include "qemu/atomic128.h"
+#include "qemu/log.h"
+#include "disas/disas.h"
+#include "arm_ldst.h"
+#include "semihosting/semihost.h"
+#include "cpregs.h"
 
 static TCGv_i64 cpu_X[32];
 static TCGv_i64 cpu_pc;
diff --git a/target/arm/tcg/translate-m-nocp.c b/target/arm/tcg/translate-m-nocp.c
index 9a89aab785..33f6478bb9 100644
--- a/target/arm/tcg/translate-m-nocp.c
+++ b/target/arm/tcg/translate-m-nocp.c
@@ -18,8 +18,6 @@ 
  */
 
 #include "qemu/osdep.h"
-#include "tcg/tcg-op.h"
-#include "tcg/tcg-op-gvec.h"
 #include "translate.h"
 #include "translate-a32.h"
 
diff --git a/target/arm/tcg/translate-mve.c b/target/arm/tcg/translate-mve.c
index 2ad3c40975..bbc7b3f4ce 100644
--- a/target/arm/tcg/translate-mve.c
+++ b/target/arm/tcg/translate-mve.c
@@ -18,9 +18,6 @@ 
  */
 
 #include "qemu/osdep.h"
-#include "tcg/tcg-op.h"
-#include "tcg/tcg-op-gvec.h"
-#include "exec/exec-all.h"
 #include "translate.h"
 #include "translate-a32.h"
 
diff --git a/target/arm/tcg/translate-neon.c b/target/arm/tcg/translate-neon.c
index 6fac577abd..03913de047 100644
--- a/target/arm/tcg/translate-neon.c
+++ b/target/arm/tcg/translate-neon.c
@@ -21,9 +21,6 @@ 
  */
 
 #include "qemu/osdep.h"
-#include "tcg/tcg-op.h"
-#include "tcg/tcg-op-gvec.h"
-#include "exec/exec-all.h"
 #include "translate.h"
 #include "translate-a32.h"
 
diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c
index b0812d9dd6..d0054e3f77 100644
--- a/target/arm/tcg/translate-sme.c
+++ b/target/arm/tcg/translate-sme.c
@@ -18,14 +18,8 @@ 
  */
 
 #include "qemu/osdep.h"
-#include "cpu.h"
-#include "tcg/tcg-op.h"
-#include "tcg/tcg-op-gvec.h"
-#include "tcg/tcg-gvec-desc.h"
 #include "translate.h"
 #include "translate-a64.h"
-#include "fpu/softfloat.h"
-
 
 /*
  * Include the generated decoder.
diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
index 106baf311f..d9d5810dde 100644
--- a/target/arm/tcg/translate-sve.c
+++ b/target/arm/tcg/translate-sve.c
@@ -18,16 +18,7 @@ 
  */
 
 #include "qemu/osdep.h"
-#include "cpu.h"
-#include "exec/exec-all.h"
-#include "tcg/tcg-op.h"
-#include "tcg/tcg-op-gvec.h"
-#include "tcg/tcg-gvec-desc.h"
-#include "qemu/log.h"
-#include "arm_ldst.h"
 #include "translate.h"
-#include "internals.h"
-#include "exec/log.h"
 #include "translate-a64.h"
 #include "fpu/softfloat.h"
 
diff --git a/target/arm/tcg/translate-vfp.c b/target/arm/tcg/translate-vfp.c
index 95ac8d9db3..359b1e3e96 100644
--- a/target/arm/tcg/translate-vfp.c
+++ b/target/arm/tcg/translate-vfp.c
@@ -21,9 +21,6 @@ 
  */
 
 #include "qemu/osdep.h"
-#include "tcg/tcg-op.h"
-#include "tcg/tcg-op-gvec.h"
-#include "exec/exec-all.h"
 #include "translate.h"
 #include "translate-a32.h"
 
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
index 7caf6d802d..a68d3c7f6d 100644
--- a/target/arm/tcg/translate.c
+++ b/target/arm/tcg/translate.c
@@ -20,20 +20,13 @@ 
  */
 #include "qemu/osdep.h"
 
-#include "cpu.h"
-#include "internals.h"
-#include "disas/disas.h"
-#include "exec/exec-all.h"
-#include "tcg/tcg-op.h"
-#include "tcg/tcg-op-gvec.h"
-#include "qemu/log.h"
-#include "qemu/bitops.h"
-#include "arm_ldst.h"
-#include "semihosting/semihost.h"
-#include "exec/log.h"
-#include "cpregs.h"
 #include "translate.h"
 #include "translate-a32.h"
+#include "qemu/log.h"
+#include "disas/disas.h"
+#include "arm_ldst.h"
+#include "semihosting/semihost.h"
+#include "cpregs.h"
 #include "exec/helper-proto.h"
 
 #define HELPER_H "helper.h"

[PULL,39/52] target/arm: Tidy helpers for translation

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