| Message ID | 20230202031655.953888-1-gaosong@loongson.cn |
|---|---|
| State | New |
| Headers | show |
| Series | [1/1] target/loongarch: LL.{W/D} need writes val to dest register after sign extension | expand |
On 2/1/23 17:16, Song Gao wrote: > The Manual 2.2.7.2: > 'The LL.{W/D} instruction retrieves a word/double-word data from > the specified address of the memory and writes it to the general > register rd after sign extension.' > > Signed-off-by: Song Gao <gaosong@loongson.cn> > --- > target/loongarch/insn_trans/trans_atomic.c.inc | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) The sign-extension is provided by TRANS(ll_w, gen_ll, MO_TESL) ^^^^^^^ this. So what's the issue? r~ > > diff --git a/target/loongarch/insn_trans/trans_atomic.c.inc b/target/loongarch/insn_trans/trans_atomic.c.inc > index 6763c1c301..24fea558d6 100644 > --- a/target/loongarch/insn_trans/trans_atomic.c.inc > +++ b/target/loongarch/insn_trans/trans_atomic.c.inc > @@ -12,8 +12,8 @@ static bool gen_ll(DisasContext *ctx, arg_rr_i *a, MemOp mop) > tcg_gen_addi_tl(t0, src1, a->imm); > tcg_gen_qemu_ld_i64(dest, t0, ctx->mem_idx, mop); > tcg_gen_st_tl(t0, cpu_env, offsetof(CPULoongArchState, lladdr)); > + gen_set_gpr(a->rd, dest, EXT_SIGN); > tcg_gen_st_tl(dest, cpu_env, offsetof(CPULoongArchState, llval)); > - gen_set_gpr(a->rd, dest, EXT_NONE); > tcg_temp_free(t0); > > return true;
在 2023/2/2 下午1:51, Richard Henderson 写道: > On 2/1/23 17:16, Song Gao wrote: >> The Manual 2.2.7.2: >> 'The LL.{W/D} instruction retrieves a word/double-word data from >> the specified address of the memory and writes it to the general >> register rd after sign extension.' >> >> Signed-off-by: Song Gao <gaosong@loongson.cn> >> --- >> target/loongarch/insn_trans/trans_atomic.c.inc | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) > > The sign-extension is provided by > > TRANS(ll_w, gen_ll, MO_TESL) > ^^^^^^^ > this. > > So what's the issue? > Sorry for the late reply. It's our other code problem, you can ignore this patch :-) Thanks Song Gao > r~ > >> >> diff --git a/target/loongarch/insn_trans/trans_atomic.c.inc >> b/target/loongarch/insn_trans/trans_atomic.c.inc >> index 6763c1c301..24fea558d6 100644 >> --- a/target/loongarch/insn_trans/trans_atomic.c.inc >> +++ b/target/loongarch/insn_trans/trans_atomic.c.inc >> @@ -12,8 +12,8 @@ static bool gen_ll(DisasContext *ctx, arg_rr_i *a, >> MemOp mop) >> tcg_gen_addi_tl(t0, src1, a->imm); >> tcg_gen_qemu_ld_i64(dest, t0, ctx->mem_idx, mop); >> tcg_gen_st_tl(t0, cpu_env, offsetof(CPULoongArchState, lladdr)); >> + gen_set_gpr(a->rd, dest, EXT_SIGN); >> tcg_gen_st_tl(dest, cpu_env, offsetof(CPULoongArchState, llval)); >> - gen_set_gpr(a->rd, dest, EXT_NONE); >> tcg_temp_free(t0); >> return true;
diff --git a/target/loongarch/insn_trans/trans_atomic.c.inc b/target/loongarch/insn_trans/trans_atomic.c.inc index 6763c1c301..24fea558d6 100644 --- a/target/loongarch/insn_trans/trans_atomic.c.inc +++ b/target/loongarch/insn_trans/trans_atomic.c.inc @@ -12,8 +12,8 @@ static bool gen_ll(DisasContext *ctx, arg_rr_i *a, MemOp mop) tcg_gen_addi_tl(t0, src1, a->imm); tcg_gen_qemu_ld_i64(dest, t0, ctx->mem_idx, mop); tcg_gen_st_tl(t0, cpu_env, offsetof(CPULoongArchState, lladdr)); + gen_set_gpr(a->rd, dest, EXT_SIGN); tcg_gen_st_tl(dest, cpu_env, offsetof(CPULoongArchState, llval)); - gen_set_gpr(a->rd, dest, EXT_NONE); tcg_temp_free(t0); return true;
The Manual 2.2.7.2: 'The LL.{W/D} instruction retrieves a word/double-word data from the specified address of the memory and writes it to the general register rd after sign extension.' Signed-off-by: Song Gao <gaosong@loongson.cn> --- target/loongarch/insn_trans/trans_atomic.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)