diff mbox series

[v3,07/11] Hexagon (target/hexagon) Add overrides for direct call instructions

Message ID 20221104192631.29434-8-tsimpson@quicinc.com
State New
Headers show
Series Hexagon (target/hexagon) performance and bug fixes | expand

Commit Message

Taylor Simpson Nov. 4, 2022, 7:26 p.m. UTC 
Add overrides for
    J2_call
    J2_callt
    J2_callf

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
 target/hexagon/gen_tcg.h |  8 ++++++
 target/hexagon/genptr.c  | 55 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 63 insertions(+)

Comments

Richard Henderson Nov. 5, 2022, 12:12 a.m. UTC | #1 
On 11/5/22 06:26, Taylor Simpson wrote:
> Add overrides for
>      J2_call
>      J2_callt
>      J2_callf
> 
> Signed-off-by: Taylor Simpson<tsimpson@quicinc.com>
> ---
>   target/hexagon/gen_tcg.h |  8 ++++++
>   target/hexagon/genptr.c  | 55 ++++++++++++++++++++++++++++++++++++++++
>   2 files changed, 63 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
Richard Henderson Nov. 5, 2022, 12:19 a.m. UTC | #2 
On 11/5/22 06:26, Taylor Simpson wrote:
> +    tcg_gen_andi_tl(lsb, pred, 1);
> +    if (!sense) {
> +        tcg_gen_xori_tl(lsb, lsb, 1);
> +    }
> +    gen_write_new_pc_pcrel(ctx, pc_off, lsb);
> +    tcg_gen_brcondi_tl(TCG_COND_EQ, lsb, 0, skip);

Better to change the branch condition than invert the lsb.


r~
Richard Henderson Nov. 5, 2022, 12:21 a.m. UTC | #3 
On 11/5/22 06:26, Taylor Simpson wrote:
> +static void gen_write_new_pc_addr(DisasContext *ctx, TCGv addr, TCGv pred)
> +{
> +    TCGLabel *pred_false = NULL;
> +    if (pred != NULL) {
> +        pred_false = gen_new_label();
> +        tcg_gen_brcondi_tl(TCG_COND_EQ, pred, 0, pred_false);
> +    }

It would be nice to pass down the entire branch condition.  Trivial for usage within this 
patch, but more complex for others.

r~
diff mbox series

Patch

diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h
index df279ab43b..fe0a5e9c13 100644
--- a/target/hexagon/gen_tcg.h
+++ b/target/hexagon/gen_tcg.h
@@ -612,6 +612,14 @@ 
         tcg_temp_free(tmp); \
     } while (0)
 
+#define fGEN_TCG_J2_call(SHORTCODE) \
+    gen_call(ctx, riV)
+
+#define fGEN_TCG_J2_callt(SHORTCODE) \
+    gen_cond_call(ctx, PuV, true, riV)
+#define fGEN_TCG_J2_callf(SHORTCODE) \
+    gen_cond_call(ctx, PuV, false, riV)
+
 #define fGEN_TCG_J2_pause(SHORTCODE) \
     do { \
         uiV = uiV; \
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
index c14263ae95..88e6898027 100644
--- a/target/hexagon/genptr.c
+++ b/target/hexagon/genptr.c
@@ -456,6 +456,35 @@  static TCGv gen_8bitsof(TCGv result, TCGv value)
     return result;
 }
 
+static void gen_write_new_pc_addr(DisasContext *ctx, TCGv addr, TCGv pred)
+{
+    TCGLabel *pred_false = NULL;
+    if (pred != NULL) {
+        pred_false = gen_new_label();
+        tcg_gen_brcondi_tl(TCG_COND_EQ, pred, 0, pred_false);
+    }
+
+    if (ctx->pkt->pkt_has_multi_cof) {
+        /* If there are multiple branches in a packet, ignore the second one */
+        tcg_gen_movcond_tl(TCG_COND_NE, hex_gpr[HEX_REG_PC],
+                           hex_branch_taken, tcg_constant_tl(0),
+                           hex_gpr[HEX_REG_PC], addr);
+        tcg_gen_movi_tl(hex_branch_taken, 1);
+    } else {
+        tcg_gen_mov_tl(hex_gpr[HEX_REG_PC], addr);
+    }
+
+    if (pred != NULL) {
+        gen_set_label(pred_false);
+    }
+}
+
+static void gen_write_new_pc_pcrel(DisasContext *ctx, int pc_off, TCGv pred)
+{
+    target_ulong dest = ctx->pkt->pc + pc_off;
+    gen_write_new_pc_addr(ctx, tcg_constant_tl(dest), pred);
+}
+
 static void gen_set_usr_field(int field, TCGv val)
 {
     tcg_gen_deposit_tl(hex_new_value[HEX_REG_USR], hex_new_value[HEX_REG_USR],
@@ -470,6 +499,32 @@  static void gen_set_usr_fieldi(int field, int x)
     gen_set_usr_field(field, val);
 }
 
+static void gen_call(DisasContext *ctx, int pc_off)
+{
+    TCGv next_PC =
+        tcg_constant_tl(ctx->pkt->pc + ctx->pkt->encod_pkt_size_in_bytes);
+    gen_log_reg_write(HEX_REG_LR, next_PC);
+    gen_write_new_pc_pcrel(ctx, pc_off, NULL);
+}
+
+static void gen_cond_call(DisasContext *ctx, TCGv pred, bool sense, int pc_off)
+{
+    TCGv next_PC;
+    TCGv lsb = tcg_temp_local_new();
+    TCGLabel *skip = gen_new_label();
+    tcg_gen_andi_tl(lsb, pred, 1);
+    if (!sense) {
+        tcg_gen_xori_tl(lsb, lsb, 1);
+    }
+    gen_write_new_pc_pcrel(ctx, pc_off, lsb);
+    tcg_gen_brcondi_tl(TCG_COND_EQ, lsb, 0, skip);
+    tcg_temp_free(lsb);
+    next_PC =
+        tcg_constant_tl(ctx->pkt->pc + ctx->pkt->encod_pkt_size_in_bytes);
+    gen_log_reg_write(HEX_REG_LR, next_PC);
+    gen_set_label(skip);
+}
+
 static void gen_sat_i64(TCGv_i64 dst, TCGv_i64 src, uint32_t bits)
 {
     TCGLabel *label = gen_new_label();