diff mbox series

[6/8] Hexagon (target/hexagon) Add overrides for various forms of jump

Message ID 20221019223739.3868-7-tsimpson@quicinc.com
State New
Headers show
Series Hexagon (target/hexagon) Improve change-of-flow | expand

Commit Message

Taylor Simpson Oct. 19, 2022, 10:37 p.m. UTC 
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
 target/hexagon/gen_tcg.h | 190 +++++++++++++++++++++++++++++++++++++++
 target/hexagon/genptr.c  |  75 ++++++++++++++++
 2 files changed, 265 insertions(+)

Comments

Matheus Tavares Bernardino Oct. 20, 2022, 3:23 p.m. UTC | #1 
Taylor Simpson <tsimpson@quicinc.com> wrote:
> diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h
> index b56b216110..dbafcae2de 100644
> --- a/target/hexagon/gen_tcg.h
> +++ b/target/hexagon/gen_tcg.h
>
> +#define fGEN_TCG_J4_cmplt_f_jumpnv_t(SHORTCODE) \
> +    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GE, NsN, RtV, riV)
> +#define fGEN_TCG_J4_cmplt_f_jumpnv_nt(SHORTCODE) \
> +    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GE, NsN, RtV, riV)
> +

Nitpick: any reason not to place these two !COND variants...

> +
> +#define fGEN_TCG_J4_cmplt_t_jumpnv_t(SHORTCODE) \
> +    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LT, NsN, RtV, riV)
> +#define fGEN_TCG_J4_cmplt_t_jumpnv_nt(SHORTCODE) \
> +    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LT, NsN, RtV, riV)
> +

...below these COND variants, like you did in the other insns?

> diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
> index 6e494c0bd8..fba76d3b38 100644
> --- a/target/hexagon/genptr.c
> +++ b/target/hexagon/genptr.c
> @@ -456,6 +456,35 @@ static TCGv gen_8bitsof(TCGv result, TCGv value)
>      return result;
>  }
>  
> +static void gen_write_new_pc_addr(DisasContext *ctx, Packet *pkt,
> +                                  TCGv addr, TCGv pred)
> +{
> +    TCGLabel *pred_false = NULL;
> +    if (pkt->pkt_has_multi_cof) {
> +        if (pred != NULL) {
> +            pred_false = gen_new_label();
> +            tcg_gen_brcondi_tl(TCG_COND_EQ, pred, 0, pred_false);
> +        }
> +        /* If there are multiple branches in a packet, ignore the second one */
> +        tcg_gen_movcond_tl(TCG_COND_NE, hex_gpr[HEX_REG_PC],
> +                           hex_branch_taken, tcg_constant_tl(0),
> +                           hex_gpr[HEX_REG_PC], addr);
> +        tcg_gen_movi_tl(hex_branch_taken, 1);
> +        if (pred != NULL) {
> +            gen_set_label(pred_false);
> +        }
> +    } else {
> +        if (pred != NULL) {
> +            pred_false = gen_new_label();
> +            tcg_gen_brcondi_tl(TCG_COND_EQ, pred, 0, pred_false);
> +        }
> +        tcg_gen_mov_tl(hex_gpr[HEX_REG_PC], addr);
> +        if (pred != NULL) {
> +            gen_set_label(pred_false);
> +        }
> +    }

Another nitpick: we could possibly extract the common code out of the
if-else branches for clarity (but note my other comment about this
function at patch 7):

static void gen_write_new_pc_addr(DisasContext *ctx, Packet *pkt,
                                  TCGv addr, TCGv pred)
{
    TCGLabel *pred_false = NULL;
    if (pred != NULL) {
        pred_false = gen_new_label();
        tcg_gen_brcondi_tl(TCG_COND_EQ, pred, 0, pred_false);
    }
    if (pkt->pkt_has_multi_cof) {
        /* If there are multiple branches in a packet, ignore the second one */
        tcg_gen_movcond_tl(TCG_COND_NE, hex_gpr[HEX_REG_PC],
                           hex_branch_taken, tcg_constant_tl(0),
                           hex_gpr[HEX_REG_PC], addr);
        tcg_gen_movi_tl(hex_branch_taken, 1);
    } else {
        tcg_gen_mov_tl(hex_gpr[HEX_REG_PC], addr);
    }
    if (pred != NULL) {
        gen_set_label(pred_false);
    }
}

> -- 
>2.17.1

The rest of the patch LGTM.
Taylor Simpson Oct. 20, 2022, 5 p.m. UTC | #2 
> -----Original Message-----
> From: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
> Sent: Thursday, October 20, 2022 10:24 AM
> To: Taylor Simpson <tsimpson@quicinc.com>
> Cc: ale@rev.ng; anjo@rev.ng; Brian Cain <bcain@quicinc.com>;
> philmd@linaro.org; qemu-devel@nongnu.org; Matheus Bernardino (QUIC)
> <quic_mathbern@quicinc.com>; richard.henderson@linaro.org
> Subject: Re: [PATCH 6/8] Hexagon (target/hexagon) Add overrides for
> various forms of jump
> 
> Taylor Simpson <tsimpson@quicinc.com> wrote:
> > diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h index
> > b56b216110..dbafcae2de 100644
> > --- a/target/hexagon/gen_tcg.h
> > +++ b/target/hexagon/gen_tcg.h
> >
> > +#define fGEN_TCG_J4_cmplt_f_jumpnv_t(SHORTCODE) \
> > +    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GE, NsN, RtV, riV) #define
> > +fGEN_TCG_J4_cmplt_f_jumpnv_nt(SHORTCODE) \
> > +    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GE, NsN, RtV, riV)
> > +
> 
> Nitpick: any reason not to place these two !COND variants...
> 
> > +
> > +#define fGEN_TCG_J4_cmplt_t_jumpnv_t(SHORTCODE) \
> > +    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LT, NsN, RtV, riV) #define
> > +fGEN_TCG_J4_cmplt_t_jumpnv_nt(SHORTCODE) \
> > +    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LT, NsN, RtV, riV)
> > +
> 
> ...below these COND variants, like you did in the other insns?
> 

Good catch, I will change this.

> > diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index
> > 6e494c0bd8..fba76d3b38 100644
> > --- a/target/hexagon/genptr.c
> > +++ b/target/hexagon/genptr.c
> > @@ -456,6 +456,35 @@ static TCGv gen_8bitsof(TCGv result, TCGv value)
> >      return result;
> >  }
> >
> > +static void gen_write_new_pc_addr(DisasContext *ctx, Packet *pkt,
> > +                                  TCGv addr, TCGv pred) {
> > +    TCGLabel *pred_false = NULL;
> > +    if (pkt->pkt_has_multi_cof) {
> > +        if (pred != NULL) {
> > +            pred_false = gen_new_label();
> > +            tcg_gen_brcondi_tl(TCG_COND_EQ, pred, 0, pred_false);
> > +        }
> > +        /* If there are multiple branches in a packet, ignore the second one */
> > +        tcg_gen_movcond_tl(TCG_COND_NE, hex_gpr[HEX_REG_PC],
> > +                           hex_branch_taken, tcg_constant_tl(0),
> > +                           hex_gpr[HEX_REG_PC], addr);
> > +        tcg_gen_movi_tl(hex_branch_taken, 1);
> > +        if (pred != NULL) {
> > +            gen_set_label(pred_false);
> > +        }
> > +    } else {
> > +        if (pred != NULL) {
> > +            pred_false = gen_new_label();
> > +            tcg_gen_brcondi_tl(TCG_COND_EQ, pred, 0, pred_false);
> > +        }
> > +        tcg_gen_mov_tl(hex_gpr[HEX_REG_PC], addr);
> > +        if (pred != NULL) {
> > +            gen_set_label(pred_false);
> > +        }
> > +    }
> 
> Another nitpick: we could possibly extract the common code out of the if-
> else branches for clarity (but note my other comment about this function at
> patch 7):
> 
> static void gen_write_new_pc_addr(DisasContext *ctx, Packet *pkt,
>                                   TCGv addr, TCGv pred) {
>     TCGLabel *pred_false = NULL;
>     if (pred != NULL) {
>         pred_false = gen_new_label();
>         tcg_gen_brcondi_tl(TCG_COND_EQ, pred, 0, pred_false);
>     }
>     if (pkt->pkt_has_multi_cof) {
>         /* If there are multiple branches in a packet, ignore the second one */
>         tcg_gen_movcond_tl(TCG_COND_NE, hex_gpr[HEX_REG_PC],
>                            hex_branch_taken, tcg_constant_tl(0),
>                            hex_gpr[HEX_REG_PC], addr);
>         tcg_gen_movi_tl(hex_branch_taken, 1);
>     } else {
>         tcg_gen_mov_tl(hex_gpr[HEX_REG_PC], addr);
>     }
>     if (pred != NULL) {
>         gen_set_label(pred_false);
>     }
> }

Yes, this will be easier to read.  I'll change it.

> The rest of the patch LGTM.

Thanks,
Taylor
diff mbox series

Patch

diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h
index b56b216110..dbafcae2de 100644
--- a/target/hexagon/gen_tcg.h
+++ b/target/hexagon/gen_tcg.h
@@ -797,6 +797,196 @@ 
 #define fGEN_TCG_J4_tstbit0_fp1_jump_t(SHORTCODE) \
     gen_cmpnd_tstbit0_jmp(ctx, pkt, insn, 1, false, RsV, riV)
 
+#define fGEN_TCG_J2_jump(SHORTCODE) \
+    gen_jump(ctx, pkt, riV)
+#define fGEN_TCG_J2_jumpr(SHORTCODE) \
+    gen_jumpr(ctx, pkt, RsV)
+#define fGEN_TCG_J4_jumpseti(SHORTCODE) \
+    do { \
+        tcg_gen_movi_tl(RdV, UiV); \
+        gen_jump(ctx, pkt, riV); \
+    } while (0)
+
+#define fGEN_TCG_cond_jump(COND) \
+    do { \
+        TCGv LSB = tcg_temp_new(); \
+        COND; \
+        gen_cond_jump(ctx, pkt, LSB, riV); \
+        tcg_temp_free(LSB); \
+    } while (0)
+
+#define fGEN_TCG_J2_jumpt(SHORTCODE) \
+    fGEN_TCG_cond_jump(fLSBOLD(PuV))
+#define fGEN_TCG_J2_jumptpt(SHORTCODE) \
+    fGEN_TCG_cond_jump(fLSBOLD(PuV))
+#define fGEN_TCG_J2_jumpf(SHORTCODE) \
+    fGEN_TCG_cond_jump(fLSBOLDNOT(PuV))
+#define fGEN_TCG_J2_jumpfpt(SHORTCODE) \
+    fGEN_TCG_cond_jump(fLSBOLDNOT(PuV))
+#define fGEN_TCG_J2_jumptnew(SHORTCODE) \
+    gen_cond_jump(ctx, pkt, PuN, riV)
+#define fGEN_TCG_J2_jumptnewpt(SHORTCODE) \
+    gen_cond_jump(ctx, pkt, PuN, riV)
+#define fGEN_TCG_J2_jumpfnewpt(SHORTCODE) \
+    fGEN_TCG_cond_jump(fLSBNEWNOT(PuN))
+#define fGEN_TCG_J2_jumpfnew(SHORTCODE) \
+    fGEN_TCG_cond_jump(fLSBNEWNOT(PuN))
+#define fGEN_TCG_J2_jumprz(SHORTCODE) \
+    fGEN_TCG_cond_jump(tcg_gen_setcondi_tl(TCG_COND_NE, LSB, RsV, 0))
+#define fGEN_TCG_J2_jumprzpt(SHORTCODE) \
+    fGEN_TCG_cond_jump(tcg_gen_setcondi_tl(TCG_COND_NE, LSB, RsV, 0))
+#define fGEN_TCG_J2_jumprnz(SHORTCODE) \
+    fGEN_TCG_cond_jump(tcg_gen_setcondi_tl(TCG_COND_EQ, LSB, RsV, 0))
+#define fGEN_TCG_J2_jumprnzpt(SHORTCODE) \
+    fGEN_TCG_cond_jump(tcg_gen_setcondi_tl(TCG_COND_EQ, LSB, RsV, 0))
+#define fGEN_TCG_J2_jumprgtez(SHORTCODE) \
+    fGEN_TCG_cond_jump(tcg_gen_setcondi_tl(TCG_COND_GE, LSB, RsV, 0))
+#define fGEN_TCG_J2_jumprgtezpt(SHORTCODE) \
+    fGEN_TCG_cond_jump(tcg_gen_setcondi_tl(TCG_COND_GE, LSB, RsV, 0))
+#define fGEN_TCG_J2_jumprltez(SHORTCODE) \
+    fGEN_TCG_cond_jump(tcg_gen_setcondi_tl(TCG_COND_LE, LSB, RsV, 0))
+#define fGEN_TCG_J2_jumprltezpt(SHORTCODE) \
+    fGEN_TCG_cond_jump(tcg_gen_setcondi_tl(TCG_COND_LE, LSB, RsV, 0))
+
+#define fGEN_TCG_cond_jumpr(COND) \
+    do { \
+        TCGv LSB = tcg_temp_new(); \
+        COND; \
+        gen_cond_jumpr(ctx, pkt, LSB, RsV); \
+        tcg_temp_free(LSB); \
+    } while (0)
+
+#define fGEN_TCG_J2_jumprt(SHORTCODE) \
+    fGEN_TCG_cond_jumpr(fLSBOLD(PuV))
+#define fGEN_TCG_J2_jumprtpt(SHORTCODE) \
+    fGEN_TCG_cond_jumpr(fLSBOLD(PuV))
+#define fGEN_TCG_J2_jumprf(SHORTCODE) \
+    fGEN_TCG_cond_jumpr(fLSBOLDNOT(PuV))
+#define fGEN_TCG_J2_jumprfpt(SHORTCODE) \
+    fGEN_TCG_cond_jumpr(fLSBOLDNOT(PuV))
+#define fGEN_TCG_J2_jumprtnew(SHORTCODE) \
+    fGEN_TCG_cond_jumpr(fLSBNEW(PuN))
+#define fGEN_TCG_J2_jumprtnewpt(SHORTCODE) \
+    fGEN_TCG_cond_jumpr(fLSBNEW(PuN))
+#define fGEN_TCG_J2_jumprfnew(SHORTCODE) \
+    fGEN_TCG_cond_jumpr(fLSBNEWNOT(PuN))
+#define fGEN_TCG_J2_jumprfnewpt(SHORTCODE) \
+    fGEN_TCG_cond_jumpr(fLSBNEWNOT(PuN))
+#define fGEN_TCG_J2_jumprfnewpt(SHORTCODE) \
+    fGEN_TCG_cond_jumpr(fLSBNEWNOT(PuN))
+
+/*
+ * New value compare & jump instructions
+ * if ([!]COND(r0.new, r1) jump:t address
+ * if ([!]COND(r0.new, #7) jump:t address
+ */
+#define fGEN_TCG_J4_cmpgt_t_jumpnv_t(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GT, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpgt_t_jumpnv_nt(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GT, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpgt_f_jumpnv_t(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LE, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpgt_f_jumpnv_nt(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LE, NsN, RtV, riV)
+
+#define fGEN_TCG_J4_cmpeq_t_jumpnv_t(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_EQ, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpeq_t_jumpnv_nt(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_EQ, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpeq_f_jumpnv_t(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_NE, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpeq_f_jumpnv_nt(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_NE, NsN, RtV, riV)
+
+#define fGEN_TCG_J4_cmplt_f_jumpnv_t(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GE, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmplt_f_jumpnv_nt(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GE, NsN, RtV, riV)
+
+#define fGEN_TCG_J4_cmpeqi_t_jumpnv_t(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_EQ, NsN, UiV, riV)
+#define fGEN_TCG_J4_cmpeqi_t_jumpnv_nt(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_EQ, NsN, UiV, riV)
+#define fGEN_TCG_J4_cmpeqi_f_jumpnv_t(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_NE, NsN, UiV, riV)
+#define fGEN_TCG_J4_cmpeqi_f_jumpnv_nt(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_NE, NsN, UiV, riV)
+
+#define fGEN_TCG_J4_cmpgti_t_jumpnv_t(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_GT, NsN, UiV, riV)
+#define fGEN_TCG_J4_cmpgti_t_jumpnv_nt(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_GT, NsN, UiV, riV)
+#define fGEN_TCG_J4_cmpgti_f_jumpnv_t(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_LE, NsN, UiV, riV)
+#define fGEN_TCG_J4_cmpgti_f_jumpnv_nt(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_LE, NsN, UiV, riV)
+
+#define fGEN_TCG_J4_cmpltu_t_jumpnv_t(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LTU, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpltu_t_jumpnv_nt(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LTU, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpltu_f_jumpnv_t(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GEU, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpltu_f_jumpnv_nt(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GEU, NsN, RtV, riV)
+
+#define fGEN_TCG_J4_cmpgtui_t_jumpnv_t(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_GTU, NsN, UiV, riV)
+#define fGEN_TCG_J4_cmpgtui_t_jumpnv_nt(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_GTU, NsN, UiV, riV)
+#define fGEN_TCG_J4_cmpgtui_f_jumpnv_t(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_LEU, NsN, UiV, riV)
+#define fGEN_TCG_J4_cmpgtui_f_jumpnv_nt(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_LEU, NsN, UiV, riV)
+
+#define fGEN_TCG_J4_cmpgtu_t_jumpnv_t(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GTU, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpgtu_t_jumpnv_nt(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_GTU, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpgtu_f_jumpnv_t(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LEU, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmpgtu_f_jumpnv_nt(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LEU, NsN, RtV, riV)
+
+#define fGEN_TCG_J4_cmplt_t_jumpnv_t(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LT, NsN, RtV, riV)
+#define fGEN_TCG_J4_cmplt_t_jumpnv_nt(SHORTCODE) \
+    gen_cmp_jumpnv(ctx, pkt, TCG_COND_LT, NsN, RtV, riV)
+
+#define fGEN_TCG_J4_cmpeqn1_t_jumpnv_t(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_EQ, NsN, -1, riV)
+#define fGEN_TCG_J4_cmpeqn1_t_jumpnv_nt(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_EQ, NsN, -1, riV)
+#define fGEN_TCG_J4_cmpeqn1_f_jumpnv_t(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_NE, NsN, -1, riV)
+#define fGEN_TCG_J4_cmpeqn1_f_jumpnv_nt(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_NE, NsN, -1, riV)
+
+#define fGEN_TCG_J4_cmpgtn1_t_jumpnv_t(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_GT, NsN, -1, riV)
+#define fGEN_TCG_J4_cmpgtn1_t_jumpnv_nt(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_GT, NsN, -1, riV)
+#define fGEN_TCG_J4_cmpgtn1_f_jumpnv_t(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_LE, NsN, -1, riV)
+#define fGEN_TCG_J4_cmpgtn1_f_jumpnv_nt(SHORTCODE) \
+    gen_cmpi_jumpnv(ctx, pkt, TCG_COND_LE, NsN, -1, riV)
+
+#define fGEN_TCG_J4_tstbit0_t_jumpnv_t(SHORTCODE) \
+    gen_testbit0_jumpnv(ctx, pkt, true, NsN, riV)
+#define fGEN_TCG_J4_tstbit0_t_jumpnv_nt(SHORTCODE) \
+    gen_testbit0_jumpnv(ctx, pkt, true, NsN, riV)
+#define fGEN_TCG_J4_tstbit0_f_jumpnv_t(SHORTCODE) \
+    gen_testbit0_jumpnv(ctx, pkt, false, NsN, riV)
+#define fGEN_TCG_J4_tstbit0_f_jumpnv_nt(SHORTCODE) \
+    gen_testbit0_jumpnv(ctx, pkt, false, NsN, riV)
+
+/* r0 = r1 ; jump address */
+#define fGEN_TCG_J4_jumpsetr(SHORTCODE) \
+    do { \
+        tcg_gen_mov_tl(RdV, RsV); \
+        gen_jump(ctx, pkt, riV); \
+    } while (0)
+
 #define fGEN_TCG_J2_pause(SHORTCODE) \
     do { \
         uiV = uiV; \
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
index 6e494c0bd8..fba76d3b38 100644
--- a/target/hexagon/genptr.c
+++ b/target/hexagon/genptr.c
@@ -456,6 +456,35 @@  static TCGv gen_8bitsof(TCGv result, TCGv value)
     return result;
 }
 
+static void gen_write_new_pc_addr(DisasContext *ctx, Packet *pkt,
+                                  TCGv addr, TCGv pred)
+{
+    TCGLabel *pred_false = NULL;
+    if (pkt->pkt_has_multi_cof) {
+        if (pred != NULL) {
+            pred_false = gen_new_label();
+            tcg_gen_brcondi_tl(TCG_COND_EQ, pred, 0, pred_false);
+        }
+        /* If there are multiple branches in a packet, ignore the second one */
+        tcg_gen_movcond_tl(TCG_COND_NE, hex_gpr[HEX_REG_PC],
+                           hex_branch_taken, tcg_constant_tl(0),
+                           hex_gpr[HEX_REG_PC], addr);
+        tcg_gen_movi_tl(hex_branch_taken, 1);
+        if (pred != NULL) {
+            gen_set_label(pred_false);
+        }
+    } else {
+        if (pred != NULL) {
+            pred_false = gen_new_label();
+            tcg_gen_brcondi_tl(TCG_COND_EQ, pred, 0, pred_false);
+        }
+        tcg_gen_mov_tl(hex_gpr[HEX_REG_PC], addr);
+        if (pred != NULL) {
+            gen_set_label(pred_false);
+        }
+    }
+}
+
 static void gen_write_new_pc_pcrel(DisasContext *ctx, Packet *pkt,
                                    int pc_off, TCGv pred)
 {
@@ -496,6 +525,12 @@  static void gen_compare(TCGCond cond, TCGv res, TCGv arg1, TCGv arg2)
     tcg_gen_movcond_tl(cond, res, arg1, arg2, one, zero);
 }
 
+static void gen_cond_jumpr(DisasContext *ctx, Packet *pkt,
+                           TCGv pred, TCGv dst_pc)
+{
+    gen_write_new_pc_addr(ctx, pkt, dst_pc, pred);
+}
+
 static void gen_cond_jump(DisasContext *ctx, Packet *pkt, TCGv pred, int pc_off)
 {
     gen_write_new_pc_pcrel(ctx, pkt, pc_off, pred);
@@ -562,6 +597,28 @@  static void gen_cmpnd_tstbit0_jmp(DisasContext *ctx, Packet *pkt, Insn *insn,
     }
 }
 
+static void gen_testbit0_jumpnv(DisasContext *ctx, Packet *pkt,
+                                bool sense, TCGv arg, int pc_off)
+{
+    TCGv pred = tcg_temp_new();
+    tcg_gen_andi_tl(pred, arg, 1);
+    if (!sense) {
+        tcg_gen_xori_tl(pred, pred, 1);
+    }
+    gen_cond_jump(ctx, pkt, pred, pc_off);
+    tcg_temp_free(pred);
+}
+
+static void gen_jump(DisasContext *ctx, Packet *pkt, int pc_off)
+{
+    gen_write_new_pc_pcrel(ctx, pkt, pc_off, NULL);
+}
+
+static void gen_jumpr(DisasContext *ctx, Packet *pkt, TCGv new_pc)
+{
+    gen_write_new_pc_addr(ctx, pkt, new_pc, NULL);
+}
+
 static void gen_call(DisasContext *ctx, Packet *pkt, int pc_off)
 {
     TCGv next_PC =
@@ -589,6 +646,24 @@  static void gen_cond_call(DisasContext *ctx, Packet *pkt,
     gen_set_label(skip);
 }
 
+static void gen_cmp_jumpnv(DisasContext *ctx, Packet *pkt,
+                           TCGCond cond, TCGv val, TCGv src, int pc_off)
+{
+    TCGv pred = tcg_temp_new();
+    tcg_gen_setcond_tl(cond, pred, val, src);
+    gen_cond_jump(ctx, pkt, pred, pc_off);
+    tcg_temp_free(pred);
+}
+
+static void gen_cmpi_jumpnv(DisasContext *ctx, Packet *pkt,
+                            TCGCond cond, TCGv val, int src, int pc_off)
+{
+    TCGv pred = tcg_temp_new();
+    tcg_gen_setcondi_tl(cond, pred, val, src);
+    gen_cond_jump(ctx, pkt, pred, pc_off);
+    tcg_temp_free(pred);
+}
+
 static intptr_t vreg_src_off(DisasContext *ctx, int num)
 {
     intptr_t offset = offsetof(CPUHexagonState, VRegs[num]);