Message ID | 20220516204913.542894-29-mst@redhat.com |
---|---|
State | New |
Headers | show |
Series | [PULL,v2,01/86] virtio: fix feature negotiation for ACCESS_PLATFORM | expand |
On Mon, 16 May 2022 at 21:51, Michael S. Tsirkin <mst@redhat.com> wrote: > > From: Jonathan Cameron <jonathan.cameron@huawei.com> > > Both registers and the CFMWS entries in CDAT use simple encodings > for the number of interleave ways and the interleave granularity. > Introduce simple conversion functions to/from the unencoded > number / size. So far the iw decode has not been needed so is > it not implemented. > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > Reviewed-by: Alex Bennée <alex.bennee@linaro.org> > Message-Id: <20220429144110.25167-27-Jonathan.Cameron@huawei.com> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com> > --- > include/hw/cxl/cxl_component.h | 8 ++++++++ > hw/cxl/cxl-component-utils.c | 34 ++++++++++++++++++++++++++++++++++ > 2 files changed, 42 insertions(+) > > diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h > index 7d8f395cbe..4f69688c47 100644 > --- a/include/hw/cxl/cxl_component.h > +++ b/include/hw/cxl/cxl_component.h > @@ -210,4 +210,12 @@ static inline int cxl_decoder_count_enc(int count) > return 0; > } > > +uint8_t cxl_interleave_ways_enc(int iw, Error **errp); > +uint8_t cxl_interleave_granularity_enc(uint64_t gran, Error **errp); > + > +static inline hwaddr cxl_decode_ig(int ig) > +{ > + return 1 << (ig + 8); > +} Hi; Coverity warns about this (CID 1488868) because the shift is calculated with 32-bit arithmetic but the function returns a 64-bit result. I assume that 'ig' is supposed to never be large enough that the result is >4GB, but we can make Coverity happy by using "1ULL" here. thanks -- PMM
diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h index 7d8f395cbe..4f69688c47 100644 --- a/include/hw/cxl/cxl_component.h +++ b/include/hw/cxl/cxl_component.h @@ -210,4 +210,12 @@ static inline int cxl_decoder_count_enc(int count) return 0; } +uint8_t cxl_interleave_ways_enc(int iw, Error **errp); +uint8_t cxl_interleave_granularity_enc(uint64_t gran, Error **errp); + +static inline hwaddr cxl_decode_ig(int ig) +{ + return 1 << (ig + 8); +} + #endif diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c index afc97b17c2..69cb07171c 100644 --- a/hw/cxl/cxl-component-utils.c +++ b/hw/cxl/cxl-component-utils.c @@ -9,6 +9,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" +#include "qapi/error.h" #include "hw/pci/pci.h" #include "hw/cxl/cxl.h" @@ -329,3 +330,36 @@ void cxl_component_create_dvsec(CXLComponentState *cxl, range_init_nofail(&cxl->dvsecs[type], cxl->dvsec_offset, length); cxl->dvsec_offset += length; } + +uint8_t cxl_interleave_ways_enc(int iw, Error **errp) +{ + switch (iw) { + case 1: return 0x0; + case 2: return 0x1; + case 4: return 0x2; + case 8: return 0x3; + case 16: return 0x4; + case 3: return 0x8; + case 6: return 0x9; + case 12: return 0xa; + default: + error_setg(errp, "Interleave ways: %d not supported", iw); + return 0; + } +} + +uint8_t cxl_interleave_granularity_enc(uint64_t gran, Error **errp) +{ + switch (gran) { + case 256: return 0; + case 512: return 1; + case 1024: return 2; + case 2048: return 3; + case 4096: return 4; + case 8192: return 5; + case 16384: return 6; + default: + error_setg(errp, "Interleave granularity: %" PRIu64 " invalid", gran); + return 0; + } +}