@@ -46,6 +46,7 @@ static void pnv_core_cpu_reset(PnvCore *pc, PowerPCCPU *cpu)
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(pc->chip);
+ PnvCoreClass *pcorec = PNV_CORE_GET_CLASS(pc);
cpu_reset(cs);
@@ -57,6 +58,8 @@ static void pnv_core_cpu_reset(PnvCore *pc, PowerPCCPU *cpu)
env->nip = 0x10;
env->msr |= MSR_HVB; /* Hypervisor mode */
env->spr[SPR_HRMOR] = pc->hrmor;
+ env->spr[SPR_HID0] |= pcorec->attn;
+
hreg_compute_hflags(env);
pcc->intc_reset(pc->chip, cpu);
@@ -300,6 +303,7 @@ static void pnv_core_power8_class_init(ObjectClass *oc, void *data)
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
pcc->xscom_ops = &pnv_core_power8_xscom_ops;
+ pcc->attn = HID0_ATTN;
}
static void pnv_core_power9_class_init(ObjectClass *oc, void *data)
@@ -307,6 +311,7 @@ static void pnv_core_power9_class_init(ObjectClass *oc, void *data)
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
pcc->xscom_ops = &pnv_core_power9_xscom_ops;
+ pcc->attn = HID0_POWER9_ATTN;
}
static void pnv_core_power10_class_init(ObjectClass *oc, void *data)
@@ -315,6 +320,7 @@ static void pnv_core_power10_class_init(ObjectClass *oc, void *data)
/* TODO: Use the P9 XSCOMs for now on P10 */
pcc->xscom_ops = &pnv_core_power9_xscom_ops;
+ pcc->attn = HID0_POWER9_ATTN;
}
static void pnv_core_class_init(ObjectClass *oc, void *data)
@@ -47,6 +47,7 @@ struct PnvCoreClass {
DeviceClass parent_class;
const MemoryRegionOps *xscom_ops;
+ uint64_t attn;
};
#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE