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Tue, 18 Jan 2022 13:07:47 +0000 (GMT) Received: from smtp.tlslab.ibm.com (unknown [9.101.4.1]) by d06av26.portsmouth.uk.ibm.com (Postfix) with SMTP; Tue, 18 Jan 2022 13:07:47 +0000 (GMT) Received: from yukon.ibmuc.com (unknown [9.171.52.153]) by smtp.tlslab.ibm.com (Postfix) with ESMTP id 5C97822016C; Tue, 18 Jan 2022 14:07:46 +0100 (CET) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Subject: [PULL 22/31] ppc/pnv: reduce stack->stack_no usage Date: Tue, 18 Jan 2022 14:07:21 +0100 Message-Id: <20220118130730.1927983-23-clg@kaod.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118130730.1927983-1-clg@kaod.org> References: <20220118130730.1927983-1-clg@kaod.org> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: ImTTqptn5UFVwIFIOxd-reYtHoj9ulx- X-Proofpoint-GUID: QYhDQjzysIsAIK5MQW64ZSRmySbzO4Na X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-18_03,2022-01-18_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxscore=0 suspectscore=0 malwarescore=0 clxscore=1034 priorityscore=1501 phishscore=0 bulkscore=0 mlxlogscore=999 impostorscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2201180081 Received-SPF: softfail client-ip=148.163.158.5; envelope-from=clg@kaod.org; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -8 X-Spam_score: -0.9 X-Spam_bar: / X-Spam_report: (-0.9 / 5.0 requ) BAYES_00=-1.9, KHOP_HELO_FCRDNS=0.322, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_SOFTFAIL=0.665 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Daniel Henrique Barboza , Richard Henderson , =?utf-8?q?C=C3=A9dric_Le_?= =?utf-8?q?Goater?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Daniel Henrique Barboza 'stack->stack_no' represents the order that a stack appears in its PEC. Its primary use is in XSCOM address space calculation in pnv_phb4_xscom_realize() when calculating the memory region offset. This attribute is redundant with phb->phb_id, which is calculated via pnv_phb4_pec_get_phb_id() using stack->stack_no information. It'll also be awkward to assign it when dealing with PECs and PHBs only in a future patch. A new pnv_phb4_get_phb_stack_no() helper is introduced to eliminate most of the stack->stack_no uses we have. The only use left after this patch is during pnv_pec_stk_default_phb_realize() when calculating phb_id, which will also handled in the next patches. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Cédric Le Goater Message-Id: <20220114180719.52117-3-danielhb413@gmail.com> Signed-off-by: Cédric Le Goater --- hw/pci-host/pnv_phb4.c | 46 +++++++++++++++++++++++++++++++----------- 1 file changed, 34 insertions(+), 12 deletions(-) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 2658ef2d84b1..4933fe57fe48 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -868,6 +868,28 @@ static uint64_t pnv_pec_stk_nest_xscom_read(void *opaque, hwaddr addr, return phb->nest_regs[reg]; } +/* + * Return the 'stack_no' of a PHB4. 'stack_no' is the order + * the PHB4 occupies in the PEC. This is the reverse of what + * pnv_phb4_pec_get_phb_id() does. + * + * E.g. a phb with phb_id = 4 and pec->index = 1 (PEC1) will + * be the second phb (stack_no = 1) of the PEC. + */ +static int pnv_phb4_get_phb_stack_no(PnvPHB4 *phb) +{ + PnvPhb4PecState *pec = phb->pec; + PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec); + int index = pec->index; + int stack_no = phb->phb_id; + + while (index--) { + stack_no -= pecc->num_stacks[index]; + } + + return stack_no; +} + static void pnv_phb4_update_regions(PnvPHB4 *phb) { /* Unmap first always */ @@ -894,10 +916,10 @@ static void pnv_phb4_update_regions(PnvPHB4 *phb) static void pnv_pec_stk_update_map(PnvPHB4 *phb) { - PnvPhb4PecStack *stack = phb->stack; PnvPhb4PecState *pec = phb->pec; MemoryRegion *sysmem = get_system_memory(); uint64_t bar_en = phb->nest_regs[PEC_NEST_STK_BAR_EN]; + int stack_no = pnv_phb4_get_phb_stack_no(phb); uint64_t bar, mask, size; char name[64]; @@ -937,7 +959,7 @@ static void pnv_pec_stk_update_map(PnvPHB4 *phb) mask = phb->nest_regs[PEC_NEST_STK_MMIO_BAR0_MASK]; size = ((~mask) >> 8) + 1; snprintf(name, sizeof(name), "pec-%d.%d-phb-%d-mmio0", - pec->chip_id, pec->index, stack->stack_no); + pec->chip_id, pec->index, stack_no); memory_region_init(&phb->mmbar0, OBJECT(phb), name, size); memory_region_add_subregion(sysmem, bar, &phb->mmbar0); phb->mmio0_base = bar; @@ -949,7 +971,7 @@ static void pnv_pec_stk_update_map(PnvPHB4 *phb) mask = phb->nest_regs[PEC_NEST_STK_MMIO_BAR1_MASK]; size = ((~mask) >> 8) + 1; snprintf(name, sizeof(name), "pec-%d.%d-phb-%d-mmio1", - pec->chip_id, pec->index, stack->stack_no); + pec->chip_id, pec->index, stack_no); memory_region_init(&phb->mmbar1, OBJECT(phb), name, size); memory_region_add_subregion(sysmem, bar, &phb->mmbar1); phb->mmio1_base = bar; @@ -960,7 +982,7 @@ static void pnv_pec_stk_update_map(PnvPHB4 *phb) bar = phb->nest_regs[PEC_NEST_STK_PHB_REGS_BAR] >> 8; size = PNV_PHB4_NUM_REGS << 3; snprintf(name, sizeof(name), "pec-%d.%d-phb-%d", - pec->chip_id, pec->index, stack->stack_no); + pec->chip_id, pec->index, stack_no); memory_region_init(&phb->phbbar, OBJECT(phb), name, size); memory_region_add_subregion(sysmem, bar, &phb->phbbar); } @@ -969,7 +991,7 @@ static void pnv_pec_stk_update_map(PnvPHB4 *phb) bar = phb->nest_regs[PEC_NEST_STK_INT_BAR] >> 8; size = PNV_PHB4_MAX_INTs << 16; snprintf(name, sizeof(name), "pec-%d.%d-phb-%d-int", - phb->pec->chip_id, phb->pec->index, stack->stack_no); + phb->pec->chip_id, phb->pec->index, stack_no); memory_region_init(&phb->intbar, OBJECT(phb), name, size); memory_region_add_subregion(sysmem, bar, &phb->intbar); } @@ -1458,9 +1480,9 @@ static AddressSpace *pnv_phb4_dma_iommu(PCIBus *bus, void *opaque, int devfn) static void pnv_phb4_xscom_realize(PnvPHB4 *phb) { - PnvPhb4PecStack *stack = phb->stack; PnvPhb4PecState *pec = phb->pec; PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec); + int stack_no = pnv_phb4_get_phb_stack_no(phb); uint32_t pec_nest_base; uint32_t pec_pci_base; char name[64]; @@ -1469,20 +1491,20 @@ static void pnv_phb4_xscom_realize(PnvPHB4 *phb) /* Initialize the XSCOM regions for the stack registers */ snprintf(name, sizeof(name), "xscom-pec-%d.%d-nest-phb-%d", - pec->chip_id, pec->index, stack->stack_no); + pec->chip_id, pec->index, stack_no); pnv_xscom_region_init(&phb->nest_regs_mr, OBJECT(phb), &pnv_pec_stk_nest_xscom_ops, phb, name, PHB4_PEC_NEST_STK_REGS_COUNT); snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci-phb-%d", - pec->chip_id, pec->index, stack->stack_no); + pec->chip_id, pec->index, stack_no); pnv_xscom_region_init(&phb->pci_regs_mr, OBJECT(phb), &pnv_pec_stk_pci_xscom_ops, phb, name, PHB4_PEC_PCI_STK_REGS_COUNT); /* PHB pass-through */ snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci-phb-%d", - pec->chip_id, pec->index, stack->stack_no); + pec->chip_id, pec->index, stack_no); pnv_xscom_region_init(&phb->phb_regs_mr, OBJECT(phb), &pnv_phb4_xscom_ops, phb, name, 0x40); @@ -1491,14 +1513,14 @@ static void pnv_phb4_xscom_realize(PnvPHB4 *phb) /* Populate the XSCOM address space. */ pnv_xscom_add_subregion(pec->chip, - pec_nest_base + 0x40 * (stack->stack_no + 1), + pec_nest_base + 0x40 * (stack_no + 1), &phb->nest_regs_mr); pnv_xscom_add_subregion(pec->chip, - pec_pci_base + 0x40 * (stack->stack_no + 1), + pec_pci_base + 0x40 * (stack_no + 1), &phb->pci_regs_mr); pnv_xscom_add_subregion(pec->chip, pec_pci_base + PNV9_XSCOM_PEC_PCI_STK0 + - 0x40 * stack->stack_no, + 0x40 * stack_no, &phb->phb_regs_mr); }