Message ID | 20211208064252.375360-8-alistair.francis@opensource.wdc.com |
---|---|
State | New |
Headers | show |
Series | A collection of RISC-V cleanups and improvements | expand |
On 12/8/21 07:42, Alistair Francis wrote: > From: Alistair Francis <alistair.francis@wdc.com> > > When realising the SoC use error_fatal instead of error_abort as the > process can fail and report useful information to the user. > > Currently a user can see this: > > $ ../qemu/bld/qemu-system-riscv64 -M sifive_u -S -monitor stdio -display none -drive if=pflash > QEMU 6.1.93 monitor - type 'help' for more information > (qemu) Unexpected error in sifive_u_otp_realize() at ../hw/misc/sifive_u_otp.c:229: > qemu-system-riscv64: OTP drive size < 16K > Aborted (core dumped) > > Which this patch addresses > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > Reported-by: Markus Armbruster <armbru@redhat.com> > --- > hw/riscv/microchip_pfsoc.c | 2 +- > hw/riscv/opentitan.c | 2 +- > hw/riscv/sifive_e.c | 2 +- > hw/riscv/sifive_u.c | 2 +- > 4 files changed, 4 insertions(+), 4 deletions(-) Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Alistair Francis <alistair.francis@opensource.wdc.com> writes: > From: Alistair Francis <alistair.francis@wdc.com> > > When realising the SoC use error_fatal instead of error_abort as the > process can fail and report useful information to the user. > > Currently a user can see this: > > $ ../qemu/bld/qemu-system-riscv64 -M sifive_u -S -monitor stdio -display none -drive if=pflash > QEMU 6.1.93 monitor - type 'help' for more information > (qemu) Unexpected error in sifive_u_otp_realize() at ../hw/misc/sifive_u_otp.c:229: > qemu-system-riscv64: OTP drive size < 16K > Aborted (core dumped) > > Which this patch addresses > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > Reported-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com>
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c index 57d779fb55..f16e4d10eb 100644 --- a/hw/riscv/microchip_pfsoc.c +++ b/hw/riscv/microchip_pfsoc.c @@ -471,7 +471,7 @@ static void microchip_icicle_kit_machine_init(MachineState *machine) /* Initialize SoC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_MICROCHIP_PFSOC); - qdev_realize(DEVICE(&s->soc), NULL, &error_abort); + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); /* Split RAM into low and high regions using aliases to machine->ram */ mem_low_size = memmap[MICROCHIP_PFSOC_DRAM_LO].size; diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index c531450b9f..0856c347e8 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -80,7 +80,7 @@ static void opentitan_board_init(MachineState *machine) /* Initialize SoC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_IBEX_SOC); - qdev_realize(DEVICE(&s->soc), NULL, &error_abort); + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_RAM].base, machine->ram); diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 9b206407a6..dcb87b6cfd 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -88,7 +88,7 @@ static void sifive_e_machine_init(MachineState *machine) /* Initialize SoC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_E_SOC); - qdev_realize(DEVICE(&s->soc), NULL, &error_abort); + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); /* Data Tightly Integrated Memory */ memory_region_add_subregion(sys_mem, diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 589ae72a59..d576484851 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -545,7 +545,7 @@ static void sifive_u_machine_init(MachineState *machine) &error_abort); object_property_set_str(OBJECT(&s->soc), "cpu-type", machine->cpu_type, &error_abort); - qdev_realize(DEVICE(&s->soc), NULL, &error_abort); + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); /* register RAM */ memory_region_add_subregion(system_memory, memmap[SIFIVE_U_DEV_DRAM].base,