Message ID | 20211023214803.522078-34-f4bug@amsat.org |
---|---|
State | New |
Headers | show |
Series | target/mips: Fully convert MSA opcodes to decodetree | expand |
On 10/23/21 2:48 PM, Philippe Mathieu-Daudé wrote: > While the first 'off' variable assignment is unused, it helps > to better understand the code logic. Move the assignation where > it would have been used so it is easier to compare the MSA > registers based on FPU ones versus the MSA specific registers. > > Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org> > --- > target/mips/tcg/msa_translate.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c index 5d8cad378e6..d196cad196b 100644 --- a/target/mips/tcg/msa_translate.c +++ b/target/mips/tcg/msa_translate.c @@ -80,13 +80,15 @@ void msa_translate_init(void) int i; for (i = 0; i < 32; i++) { - int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); + int off; /* * The MSA vector registers are mapped on the * scalar floating-point unit (FPU) registers. */ + off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); msa_wr_d[i * 2] = fpu_f64[i]; + off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); msa_wr_d[i * 2 + 1] = tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]);
While the first 'off' variable assignment is unused, it helps to better understand the code logic. Move the assignation where it would have been used so it is easier to compare the MSA registers based on FPU ones versus the MSA specific registers. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- target/mips/tcg/msa_translate.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)