From patchwork Fri Jul 9 11:09:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Zhong X-Patchwork-Id: 1503040 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GLrRL2dd5z9sSs for ; Fri, 9 Jul 2021 21:24:46 +1000 (AEST) Received: from localhost ([::1]:58050 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m1oce-0006eu-2A for incoming@patchwork.ozlabs.org; Fri, 09 Jul 2021 07:24:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38276) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m1oTL-0007W4-9x for qemu-devel@nongnu.org; Fri, 09 Jul 2021 07:15:07 -0400 Received: from mga06.intel.com ([134.134.136.31]:37173) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m1oTJ-0005A9-NR for qemu-devel@nongnu.org; Fri, 09 Jul 2021 07:15:07 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10039"; a="270800807" X-IronPort-AV: E=Sophos;i="5.84,226,1620716400"; d="scan'208";a="270800807" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jul 2021 04:14:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,226,1620716400"; d="scan'208";a="428730222" Received: from icx-2s.bj.intel.com ([10.240.192.119]) by orsmga002.jf.intel.com with ESMTP; 09 Jul 2021 04:14:40 -0700 From: Yang Zhong To: qemu-devel@nongnu.org Subject: [PATCH v3 15/33] Adjust min CPUID level to 0x12 when SGX is enabled Date: Fri, 9 Jul 2021 19:09:37 +0800 Message-Id: <20210709110955.73256-16-yang.zhong@intel.com> X-Mailer: git-send-email 2.29.2.334.gfaefdd61ec In-Reply-To: <20210709110955.73256-1-yang.zhong@intel.com> References: <20210709110955.73256-1-yang.zhong@intel.com> MIME-Version: 1.0 Received-SPF: pass client-ip=134.134.136.31; envelope-from=yang.zhong@intel.com; helo=mga06.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, seanjc@google.com, kai.huang@intel.com, jarkko@kernel.org, pbonzini@redhat.com, eblake@redhat.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Sean Christopherson SGX capabilities are enumerated through CPUID_0x12. Signed-off-by: Sean Christopherson Signed-off-by: Yang Zhong --- target/i386/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d5c0f5dba2..4172081cee 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6113,6 +6113,11 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp) if (sev_enabled()) { x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F); } + + /* SGX requires CPUID[0x12] for EPC enumeration */ + if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12); + } } /* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set */