diff mbox series

hw/nvme: fix missing check for PMR capability

Message ID 20210607094757.29661-1-its@irrelevant.dk
State New
Headers show
Series hw/nvme: fix missing check for PMR capability | expand

Commit Message

Klaus Jensen June 7, 2021, 9:47 a.m. UTC
From: Klaus Jensen <k.jensen@samsung.com>

Qiang Liu reported that an access on an unknown address is triggered in
memory_region_set_enabled because a check on CAP.PMRS is missing for the
PMRCTL register write when no PMR is configured.

Cc: qemu-stable@nongnu.org
Fixes: 75c3c9de961d ("hw/block/nvme: disable PMR at boot up")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/362
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
---
 hw/nvme/ctrl.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Klaus Jensen June 17, 2021, 7:17 p.m. UTC | #1
On Jun  7 11:47, Klaus Jensen wrote:
>From: Klaus Jensen <k.jensen@samsung.com>
>
>Qiang Liu reported that an access on an unknown address is triggered in
>memory_region_set_enabled because a check on CAP.PMRS is missing for the
>PMRCTL register write when no PMR is configured.
>
>Cc: qemu-stable@nongnu.org
>Fixes: 75c3c9de961d ("hw/block/nvme: disable PMR at boot up")
>Resolves: https://gitlab.com/qemu-project/qemu/-/issues/362
>Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
>---
> hw/nvme/ctrl.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
>diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
>index 0bcaf7192f99..463772602c4e 100644
>--- a/hw/nvme/ctrl.c
>+++ b/hw/nvme/ctrl.c
>@@ -5583,6 +5583,10 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset, uint64_t data,
>                        "invalid write to PMRCAP register, ignored");
>         return;
>     case 0xe04: /* PMRCTL */
>+        if (!NVME_CAP_PMRS(n->bar.cap)) {
>+            return;
>+        }
>+
>         n->bar.pmrctl = data;
>         if (NVME_PMRCTL_EN(data)) {
>             memory_region_set_enabled(&n->pmr.dev->mr, true);
>-- 
>2.31.1
>

Bump :)
Klaus Jensen June 28, 2021, 5:03 p.m. UTC | #2
On Jun 17 21:17, Klaus Jensen wrote:
>On Jun  7 11:47, Klaus Jensen wrote:
>>From: Klaus Jensen <k.jensen@samsung.com>
>>
>>Qiang Liu reported that an access on an unknown address is triggered in
>>memory_region_set_enabled because a check on CAP.PMRS is missing for the
>>PMRCTL register write when no PMR is configured.
>>
>>Cc: qemu-stable@nongnu.org
>>Fixes: 75c3c9de961d ("hw/block/nvme: disable PMR at boot up")
>>Resolves: https://gitlab.com/qemu-project/qemu/-/issues/362
>>Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
>>---
>>hw/nvme/ctrl.c | 4 ++++
>>1 file changed, 4 insertions(+)
>>
>>diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
>>index 0bcaf7192f99..463772602c4e 100644
>>--- a/hw/nvme/ctrl.c
>>+++ b/hw/nvme/ctrl.c
>>@@ -5583,6 +5583,10 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset, uint64_t data,
>>                       "invalid write to PMRCAP register, ignored");
>>        return;
>>    case 0xe04: /* PMRCTL */
>>+        if (!NVME_CAP_PMRS(n->bar.cap)) {
>>+            return;
>>+        }
>>+
>>        n->bar.pmrctl = data;
>>        if (NVME_PMRCTL_EN(data)) {
>>            memory_region_set_enabled(&n->pmr.dev->mr, true);
>>-- 
>>2.31.1
>>
>
>Bump :)

Bump^2 :)
Keith Busch June 28, 2021, 8:35 p.m. UTC | #3
On Mon, Jun 07, 2021 at 11:47:57AM +0200, Klaus Jensen wrote:
> From: Klaus Jensen <k.jensen@samsung.com>
> 
> Qiang Liu reported that an access on an unknown address is triggered in
> memory_region_set_enabled because a check on CAP.PMRS is missing for the
> PMRCTL register write when no PMR is configured.
> 
> Cc: qemu-stable@nongnu.org
> Fixes: 75c3c9de961d ("hw/block/nvme: disable PMR at boot up")
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/362
> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>

Looks good.

Reviewed-by: Keith Busch <kbusch@kernel.org>

> ---
>  hw/nvme/ctrl.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
> index 0bcaf7192f99..463772602c4e 100644
> --- a/hw/nvme/ctrl.c
> +++ b/hw/nvme/ctrl.c
> @@ -5583,6 +5583,10 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset, uint64_t data,
>                         "invalid write to PMRCAP register, ignored");
>          return;
>      case 0xe04: /* PMRCTL */
> +        if (!NVME_CAP_PMRS(n->bar.cap)) {
> +            return;
> +        }
> +
>          n->bar.pmrctl = data;
>          if (NVME_PMRCTL_EN(data)) {
>              memory_region_set_enabled(&n->pmr.dev->mr, true);
> -- 
> 2.31.1
Klaus Jensen June 29, 2021, 5:19 a.m. UTC | #4
On Jun  7 11:47, Klaus Jensen wrote:
>From: Klaus Jensen <k.jensen@samsung.com>
>
>Qiang Liu reported that an access on an unknown address is triggered in
>memory_region_set_enabled because a check on CAP.PMRS is missing for the
>PMRCTL register write when no PMR is configured.
>
>Cc: qemu-stable@nongnu.org
>Fixes: 75c3c9de961d ("hw/block/nvme: disable PMR at boot up")
>Resolves: https://gitlab.com/qemu-project/qemu/-/issues/362
>Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
>---
> hw/nvme/ctrl.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
>diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
>index 0bcaf7192f99..463772602c4e 100644
>--- a/hw/nvme/ctrl.c
>+++ b/hw/nvme/ctrl.c
>@@ -5583,6 +5583,10 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset, uint64_t data,
>                        "invalid write to PMRCAP register, ignored");
>         return;
>     case 0xe04: /* PMRCTL */
>+        if (!NVME_CAP_PMRS(n->bar.cap)) {
>+            return;
>+        }
>+
>         n->bar.pmrctl = data;
>         if (NVME_PMRCTL_EN(data)) {
>             memory_region_set_enabled(&n->pmr.dev->mr, true);
>-- 
>2.31.1
>

Applied to nvme-next!
diff mbox series

Patch

diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 0bcaf7192f99..463772602c4e 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -5583,6 +5583,10 @@  static void nvme_write_bar(NvmeCtrl *n, hwaddr offset, uint64_t data,
                        "invalid write to PMRCAP register, ignored");
         return;
     case 0xe04: /* PMRCTL */
+        if (!NVME_CAP_PMRS(n->bar.cap)) {
+            return;
+        }
+
         n->bar.pmrctl = data;
         if (NVME_PMRCTL_EN(data)) {
             memory_region_set_enabled(&n->pmr.dev->mr, true);