From patchwork Tue May 11 06:20:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Zhong X-Patchwork-Id: 1476860 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FfT7T6YFrz9t0T for ; Tue, 11 May 2021 16:49:57 +1000 (AEST) Received: from localhost ([::1]:56984 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lgMDL-00009q-Uy for incoming@patchwork.ozlabs.org; Tue, 11 May 2021 02:49:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40938) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lgLtb-0008Eu-PS for qemu-devel@nongnu.org; Tue, 11 May 2021 02:29:33 -0400 Received: from mga06.intel.com ([134.134.136.31]:46423) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lgLtV-0004ZR-F1 for qemu-devel@nongnu.org; Tue, 11 May 2021 02:29:31 -0400 IronPort-SDR: vHAR6WBNU3rDRdHhReCQnBqynW4or5u7cpQ9jkTltC+5gcZVCxEqjUxMt2WruwzPgaKv9jDVGe FKnvCAQcUDvw== X-IronPort-AV: E=McAfee;i="6200,9189,9980"; a="260631596" X-IronPort-AV: E=Sophos;i="5.82,290,1613462400"; d="scan'208";a="260631596" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2021 23:28:29 -0700 IronPort-SDR: 2kSNYgPY2QXReE+gkKARNrWQ3zDff4V4SA2RN+KA1mb7yLkClaMzezoeNhfQJM3KVoR+swHlQk CR4X1zwIeDuw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,290,1613462400"; d="scan'208";a="391281427" Received: from icx-2s.bj.intel.com ([10.240.192.119]) by orsmga003.jf.intel.com with ESMTP; 10 May 2021 23:28:26 -0700 From: Yang Zhong To: qemu-devel@nongnu.org Subject: [PATCH v2 30/32] Kconfig: Add CONFIG_SGX support Date: Tue, 11 May 2021 14:20:49 +0800 Message-Id: <20210511062051.41948-31-yang.zhong@intel.com> X-Mailer: git-send-email 2.29.2.334.gfaefdd61ec In-Reply-To: <20210511062051.41948-1-yang.zhong@intel.com> References: <20210511062051.41948-1-yang.zhong@intel.com> MIME-Version: 1.0 Received-SPF: pass client-ip=134.134.136.31; envelope-from=yang.zhong@intel.com; helo=mga06.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, pbonzini@redhat.com, kai.huang@intel.com, seanjc@google.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add new CONFIG_SGX for sgx support in the Qemu, and the Kconfig default enable sgx in the i386 platform. Signed-off-by: Yang Zhong --- backends/meson.build | 2 +- default-configs/devices/i386-softmmu.mak | 1 + hw/i386/Kconfig | 5 +++++ hw/i386/meson.build | 2 +- hw/i386/sgx-stub.c | 13 +++++++++++++ 5 files changed, 21 insertions(+), 2 deletions(-) create mode 100644 hw/i386/sgx-stub.c diff --git a/backends/meson.build b/backends/meson.build index 46fd16b269..6e68945528 100644 --- a/backends/meson.build +++ b/backends/meson.build @@ -16,6 +16,6 @@ softmmu_ss.add(when: ['CONFIG_VHOST_USER', 'CONFIG_VIRTIO'], if_true: files('vho softmmu_ss.add(when: 'CONFIG_VIRTIO_CRYPTO', if_true: files('cryptodev-vhost.c')) softmmu_ss.add(when: ['CONFIG_VIRTIO_CRYPTO', 'CONFIG_VHOST_CRYPTO'], if_true: files('cryptodev-vhost-user.c')) softmmu_ss.add(when: 'CONFIG_GIO', if_true: [files('dbus-vmstate.c'), gio]) -softmmu_ss.add(when: 'CONFIG_LINUX', if_true: files('hostmem-epc.c')) +softmmu_ss.add(when: 'CONFIG_SGX', if_true: files('hostmem-epc.c')) subdir('tpm') diff --git a/default-configs/devices/i386-softmmu.mak b/default-configs/devices/i386-softmmu.mak index 84d1a2487c..598c6646df 100644 --- a/default-configs/devices/i386-softmmu.mak +++ b/default-configs/devices/i386-softmmu.mak @@ -22,6 +22,7 @@ #CONFIG_TPM_CRB=n #CONFIG_TPM_TIS_ISA=n #CONFIG_VTD=n +#CONFIG_SGX=n # Boards: # diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index 7f91f30877..581526be44 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -2,6 +2,10 @@ config SEV bool depends on KVM +config SGX + bool + depends on KVM + config PC bool imply APPLESMC @@ -17,6 +21,7 @@ config PC imply PVPANIC_ISA imply QXL imply SEV + imply SGX imply SGA imply TEST_DEVICES imply TPM_CRB diff --git a/hw/i386/meson.build b/hw/i386/meson.build index 087426c75c..f79f1bafab 100644 --- a/hw/i386/meson.build +++ b/hw/i386/meson.build @@ -5,7 +5,6 @@ i386_ss.add(files( 'e820_memory_layout.c', 'multiboot.c', 'x86.c', - 'sgx-epc.c', )) i386_ss.add(when: 'CONFIG_X86_IOMMU', if_true: files('x86-iommu.c'), @@ -17,6 +16,7 @@ i386_ss.add(when: 'CONFIG_Q35', if_true: files('pc_q35.c')) i386_ss.add(when: 'CONFIG_VMMOUSE', if_true: files('vmmouse.c')) i386_ss.add(when: 'CONFIG_VMPORT', if_true: files('vmport.c')) i386_ss.add(when: 'CONFIG_VTD', if_true: files('intel_iommu.c')) +i386_ss.add(when: 'CONFIG_SGX', if_true: files('sgx-epc.c'), if_false: files('sgx-stub.c')) i386_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-common.c')) i386_ss.add(when: 'CONFIG_ACPI_HW_REDUCED', if_true: files('generic_event_device_x86.c')) diff --git a/hw/i386/sgx-stub.c b/hw/i386/sgx-stub.c new file mode 100644 index 0000000000..edf17c3309 --- /dev/null +++ b/hw/i386/sgx-stub.c @@ -0,0 +1,13 @@ +#include "qemu/osdep.h" +#include "hw/i386/pc.h" +#include "hw/i386/sgx-epc.h" + +void pc_machine_init_sgx_epc(PCMachineState *pcms) +{ + return; +} + +int sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size) +{ + return 1; +}