diff mbox series

docs/system: riscv: Include shakti_c machine documentation

Message ID 20210430070534.1487242-1-bmeng.cn@gmail.com
State New
Headers show
Series docs/system: riscv: Include shakti_c machine documentation | expand

Commit Message

Bin Meng April 30, 2021, 7:05 a.m. UTC
shakti_c machine documentation was missed in the riscv target doc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 docs/system/target-riscv.rst | 1 +
 1 file changed, 1 insertion(+)

Comments

Alistair Francis May 5, 2021, 10:41 p.m. UTC | #1
On Fri, Apr 30, 2021 at 5:08 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> shakti_c machine documentation was missed in the riscv target doc.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>
>  docs/system/target-riscv.rst | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/docs/system/target-riscv.rst b/docs/system/target-riscv.rst
> index 8d5946fbbb..4b3c78382c 100644
> --- a/docs/system/target-riscv.rst
> +++ b/docs/system/target-riscv.rst
> @@ -67,6 +67,7 @@ undocumented; you can get a complete list by running
>     :maxdepth: 1
>
>     riscv/microchip-icicle-kit
> +   riscv/shakti-c
>     riscv/sifive_u
>
>  RISC-V CPU features
> --
> 2.25.1
>
>
Alistair Francis May 5, 2021, 11 p.m. UTC | #2
On Fri, Apr 30, 2021 at 5:08 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> shakti_c machine documentation was missed in the riscv target doc.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

In order to not break the doc build I squashed this commit into the
original one adding the documentation.

Alistair

> ---
>
>  docs/system/target-riscv.rst | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/docs/system/target-riscv.rst b/docs/system/target-riscv.rst
> index 8d5946fbbb..4b3c78382c 100644
> --- a/docs/system/target-riscv.rst
> +++ b/docs/system/target-riscv.rst
> @@ -67,6 +67,7 @@ undocumented; you can get a complete list by running
>     :maxdepth: 1
>
>     riscv/microchip-icicle-kit
> +   riscv/shakti-c
>     riscv/sifive_u
>
>  RISC-V CPU features
> --
> 2.25.1
>
>
diff mbox series

Patch

diff --git a/docs/system/target-riscv.rst b/docs/system/target-riscv.rst
index 8d5946fbbb..4b3c78382c 100644
--- a/docs/system/target-riscv.rst
+++ b/docs/system/target-riscv.rst
@@ -67,6 +67,7 @@  undocumented; you can get a complete list by running
    :maxdepth: 1
 
    riscv/microchip-icicle-kit
+   riscv/shakti-c
    riscv/sifive_u
 
 RISC-V CPU features