From patchwork Fri Apr 16 16:27:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Claudio Fontana X-Patchwork-Id: 1467174 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FMNCY287cz9sRR for ; Sat, 17 Apr 2021 03:16:08 +1000 (AEST) Received: from localhost ([::1]:37866 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lXS4c-0000Su-QV for incoming@patchwork.ozlabs.org; Fri, 16 Apr 2021 13:16:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46794) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lXRLP-0004jr-Em for qemu-devel@nongnu.org; Fri, 16 Apr 2021 12:29:23 -0400 Received: from mx2.suse.de ([195.135.220.15]:45352) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lXRLA-0001Y4-Cs for qemu-devel@nongnu.org; Fri, 16 Apr 2021 12:29:23 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id D0343B2FC; Fri, 16 Apr 2021 16:28:50 +0000 (UTC) From: Claudio Fontana To: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [RFC v14 54/80] Revert "target/arm: Restrict v8M IDAU to TCG" Date: Fri, 16 Apr 2021 18:27:58 +0200 Message-Id: <20210416162824.25131-55-cfontana@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210416162824.25131-1-cfontana@suse.de> References: <20210416162824.25131-1-cfontana@suse.de> MIME-Version: 1.0 Received-SPF: pass client-ip=195.135.220.15; envelope-from=cfontana@suse.de; helo=mx2.suse.de X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org, Roman Bolshakov , Claudio Fontana , Paolo Bonzini Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This reverts commit 6e937ba7f8fb90d66cb3781f7fed32fb4239556a This change breaks quickly at startup, as all interfaces in boards are checked in vl.c in select_machine(): { GSList *machines = object_class_get_list(TYPE_MACHINE, false); } In order to restrict v8M IDAU to TCG, we need to first disable all incompatible boards when building only KVM. Signed-off-by: Claudio Fontana Cc: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/arm/cpu.c | 7 +++++++ target/arm/tcg/tcg-cpu-models.c | 8 -------- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index ae28779edd..7a013eb613 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1509,9 +1509,16 @@ static const TypeInfo arm_cpu_type_info = { .class_init = arm_cpu_class_init, }; +static const TypeInfo idau_interface_type_info = { + .name = TYPE_IDAU_INTERFACE, + .parent = TYPE_INTERFACE, + .class_size = sizeof(IDAUInterfaceClass), +}; + static void arm_cpu_register_types(void) { type_register_static(&arm_cpu_type_info); + type_register_static(&idau_interface_type_info); #ifdef CONFIG_KVM type_register_static(&host_arm_cpu_type_info); diff --git a/target/arm/tcg/tcg-cpu-models.c b/target/arm/tcg/tcg-cpu-models.c index 5dc8e2c93f..840e284f47 100644 --- a/target/arm/tcg/tcg-cpu-models.c +++ b/target/arm/tcg/tcg-cpu-models.c @@ -11,7 +11,6 @@ #include "qemu/osdep.h" #include "tcg/tcg-cpu.h" #include "internals.h" -#include "target/arm/idau.h" #if !defined(CONFIG_USER_ONLY) #include "hw/boards.h" #endif @@ -986,17 +985,10 @@ static const ARMCPUInfo arm_tcg_cpus[] = { #endif }; -static const TypeInfo idau_interface_type_info = { - .name = TYPE_IDAU_INTERFACE, - .parent = TYPE_INTERFACE, - .class_size = sizeof(IDAUInterfaceClass), -}; - static void arm_tcg_cpu_register_types(void) { size_t i; - type_register_static(&idau_interface_type_info); for (i = 0; i < ARRAY_SIZE(arm_tcg_cpus); ++i) { arm32_cpu_register(&arm_tcg_cpus[i]); }