| Message ID | 20210329170818.23139-4-bmeng.cn@gmail.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/8] hw/riscv: sifive_u: Switch to use qemu_fdt_setprop_string_array() helper | expand |
On Mon, Mar 29, 2021 at 1:12 PM Bin Meng <bmeng.cn@gmail.com> wrote: > > From: Bin Meng <bin.meng@windriver.com> > > The official DT bindings of PLIC uses "sifive,plic-1.0.0" as the > compatible string in the upstream Linux kernel. "riscv,plic0" is > now legacy and has to be kept for backward compatibility of legacy > systems. > > Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > > hw/riscv/sifive_u.c | 4 +++- > hw/riscv/virt.c | 4 +++- > 2 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c > index 7f696ebc12..651a439528 100644 > --- a/hw/riscv/sifive_u.c > +++ b/hw/riscv/sifive_u.c > @@ -98,6 +98,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, > char *nodename; > const char *ethclk_names[2] = { "pclk", "hclk" }; > const char *clint_compat[2] = { "sifive,clint0", "riscv,clint0" }; > + const char *plic_compat[2] = { "sifive,plic-1.0.0", "riscv,plic0" }; > uint32_t plic_phandle, prci_phandle, gpio_phandle, phandle = 1; > uint32_t hfclk_phandle, rtcclk_phandle, phy_phandle; > > @@ -269,7 +270,8 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, > (long)memmap[SIFIVE_U_DEV_PLIC].base); > qemu_fdt_add_subnode(fdt, nodename); > qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 1); > - qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv,plic0"); > + qemu_fdt_setprop_string_array(fdt, nodename, "compatible", > + (char **)&plic_compat, ARRAY_SIZE(plic_compat)); > qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); > qemu_fdt_setprop(fdt, nodename, "interrupts-extended", > cells, (ms->smp.cpus * 4 - 2) * sizeof(uint32_t)); > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 5b4fac015d..d04733d97c 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -194,6 +194,7 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap, > char *mem_name, *cpu_name, *core_name, *intc_name; > char *name, *clint_name, *plic_name, *clust_name; > const char *clint_compat[2] = { "sifive,clint0", "riscv,clint0" }; > + const char *plic_compat[2] = { "sifive,plic-1.0.0", "riscv,plic0" }; > hwaddr flashsize = virt_memmap[VIRT_FLASH].size / 2; > hwaddr flashbase = virt_memmap[VIRT_FLASH].base; > > @@ -318,7 +319,8 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap, > "#address-cells", FDT_PLIC_ADDR_CELLS); > qemu_fdt_setprop_cell(fdt, plic_name, > "#interrupt-cells", FDT_PLIC_INT_CELLS); > - qemu_fdt_setprop_string(fdt, plic_name, "compatible", "riscv,plic0"); > + qemu_fdt_setprop_string_array(fdt, plic_name, "compatible", > + (char **)&plic_compat, ARRAY_SIZE(plic_compat)); > qemu_fdt_setprop(fdt, plic_name, "interrupt-controller", NULL, 0); > qemu_fdt_setprop(fdt, plic_name, "interrupts-extended", > plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); > -- > 2.25.1 > >
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 7f696ebc12..651a439528 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -98,6 +98,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, char *nodename; const char *ethclk_names[2] = { "pclk", "hclk" }; const char *clint_compat[2] = { "sifive,clint0", "riscv,clint0" }; + const char *plic_compat[2] = { "sifive,plic-1.0.0", "riscv,plic0" }; uint32_t plic_phandle, prci_phandle, gpio_phandle, phandle = 1; uint32_t hfclk_phandle, rtcclk_phandle, phy_phandle; @@ -269,7 +270,8 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, (long)memmap[SIFIVE_U_DEV_PLIC].base); qemu_fdt_add_subnode(fdt, nodename); qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 1); - qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv,plic0"); + qemu_fdt_setprop_string_array(fdt, nodename, "compatible", + (char **)&plic_compat, ARRAY_SIZE(plic_compat)); qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); qemu_fdt_setprop(fdt, nodename, "interrupts-extended", cells, (ms->smp.cpus * 4 - 2) * sizeof(uint32_t)); diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 5b4fac015d..d04733d97c 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -194,6 +194,7 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap, char *mem_name, *cpu_name, *core_name, *intc_name; char *name, *clint_name, *plic_name, *clust_name; const char *clint_compat[2] = { "sifive,clint0", "riscv,clint0" }; + const char *plic_compat[2] = { "sifive,plic-1.0.0", "riscv,plic0" }; hwaddr flashsize = virt_memmap[VIRT_FLASH].size / 2; hwaddr flashbase = virt_memmap[VIRT_FLASH].base; @@ -318,7 +319,8 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap, "#address-cells", FDT_PLIC_ADDR_CELLS); qemu_fdt_setprop_cell(fdt, plic_name, "#interrupt-cells", FDT_PLIC_INT_CELLS); - qemu_fdt_setprop_string(fdt, plic_name, "compatible", "riscv,plic0"); + qemu_fdt_setprop_string_array(fdt, plic_name, "compatible", + (char **)&plic_compat, ARRAY_SIZE(plic_compat)); qemu_fdt_setprop(fdt, plic_name, "interrupt-controller", NULL, 0); qemu_fdt_setprop(fdt, plic_name, "interrupts-extended", plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4);