diff mbox series

[v2,2/3] target/m68k: reformat m68k_features enum

Message ID 20210308121155.2476-3-mark.cave-ayland@ilande.co.uk
State New
Headers show
Series target/m68k: MacOS related fixes | expand

Commit Message

Mark Cave-Ayland March 8, 2021, 12:11 p.m. UTC 
Move the feature comment from after the feature name to the preceding line to
allow for longer feature names and descriptions without hitting the 80
character line limit.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
 target/m68k/cpu.h | 66 +++++++++++++++++++++++++++++++----------------
 1 file changed, 44 insertions(+), 22 deletions(-)

Comments

Laurent Vivier March 8, 2021, 5:33 p.m. UTC | #1 
Le 08/03/2021 à 13:11, Mark Cave-Ayland a écrit :
> Move the feature comment from after the feature name to the preceding line to
> allow for longer feature names and descriptions without hitting the 80
> character line limit.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
>  target/m68k/cpu.h | 66 +++++++++++++++++++++++++++++++----------------
>  1 file changed, 44 insertions(+), 22 deletions(-)
> 
> diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
> index 7c3feeaf8a..ce558e9b03 100644
> --- a/target/m68k/cpu.h
> +++ b/target/m68k/cpu.h
> @@ -475,36 +475,58 @@ void do_m68k_semihosting(CPUM68KState *env, int nr);
>   */
>  
>  enum m68k_features {
> -    M68K_FEATURE_M68000,   /* Base m68k instruction set */
> +    /* Base m68k instruction set */
> +    M68K_FEATURE_M68000,
>      M68K_FEATURE_M68010,
>      M68K_FEATURE_M68020,
>      M68K_FEATURE_M68030,
>      M68K_FEATURE_M68040,
>      M68K_FEATURE_M68060,
> -    M68K_FEATURE_CF_ISA_A, /* Base Coldfire set Rev A. */
> -    M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */
> -    M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
> -    M68K_FEATURE_BRAL, /* BRA with Long branch. (680[2346]0, ISA A+ or B). */
> +    /* Base Coldfire set Rev A. */
> +    M68K_FEATURE_CF_ISA_A,
> +    /* (ISA B or C). */
> +    M68K_FEATURE_CF_ISA_B,
> +    /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
> +    M68K_FEATURE_CF_ISA_APLUSC,
> +    /* BRA with Long branch. (680[2346]0, ISA A+ or B). */
> +    M68K_FEATURE_BRAL,
>      M68K_FEATURE_CF_FPU,
>      M68K_FEATURE_CF_MAC,
>      M68K_FEATURE_CF_EMAC,
> -    M68K_FEATURE_CF_EMAC_B,   /* Revision B EMAC (dual accumulate). */
> -    M68K_FEATURE_USP, /* User Stack Pointer. (680[012346]0, ISA A+, B or C).*/
> -    M68K_FEATURE_MSP, /* Master Stack Pointer. (680[234]0) */
> -    M68K_FEATURE_EXT_FULL,    /* 68020+ full extension word. */
> -    M68K_FEATURE_WORD_INDEX,  /* word sized address index registers. */
> -    M68K_FEATURE_SCALED_INDEX, /* scaled address index registers. */
> -    M68K_FEATURE_LONG_MULDIV, /* 32 bit mul/div. (680[2346]0, and CPU32) */
> -    M68K_FEATURE_QUAD_MULDIV, /* 64 bit mul/div. (680[2346]0, and CPU32) */
> -    M68K_FEATURE_BCCL,  /* Bcc with Long branches. (680[2346]0, and CPU32) */
> -    M68K_FEATURE_BITFIELD, /* BFxxx Bit field insns. (680[2346]0) */
> -    M68K_FEATURE_FPU,   /* fpu insn. (680[46]0) */
> -    M68K_FEATURE_CAS,   /* CAS/CAS2[WL] insns. (680[2346]0) */
> -    M68K_FEATURE_BKPT,  /* BKPT insn. (680[12346]0, and CPU32) */
> -    M68K_FEATURE_RTD,   /* RTD insn. (680[12346]0, and CPU32) */
> -    M68K_FEATURE_CHK2,  /* CHK2 insn. (680[2346]0, and CPU32) */
> -    M68K_FEATURE_MOVEP, /* MOVEP insn. (680[01234]0, and CPU32) */
> -    M68K_FEATURE_MOVEC, /* MOVEC insn. (from 68010) */
> +    /* Revision B EMAC (dual accumulate). */
> +    M68K_FEATURE_CF_EMAC_B,
> +    /* User Stack Pointer. (680[012346]0, ISA A+, B or C). */
> +    M68K_FEATURE_USP,
> +    /* Master Stack Pointer. (680[234]0) */
> +    M68K_FEATURE_MSP,
> +    /* 68020+ full extension word. */
> +    M68K_FEATURE_EXT_FULL,
> +    /* word sized address index registers. */
> +    M68K_FEATURE_WORD_INDEX,
> +    /* scaled address index registers. */
> +    M68K_FEATURE_SCALED_INDEX,
> +    /* 32 bit mul/div. (680[2346]0, and CPU32) */
> +    M68K_FEATURE_LONG_MULDIV,
> +    /* 64 bit mul/div. (680[2346]0, and CPU32) */
> +    M68K_FEATURE_QUAD_MULDIV,
> +    /* Bcc with Long branches. (680[2346]0, and CPU32) */
> +    M68K_FEATURE_BCCL,
> +    /* BFxxx Bit field insns. (680[2346]0) */
> +    M68K_FEATURE_BITFIELD,
> +    /* fpu insn. (680[46]0) */
> +    M68K_FEATURE_FPU,
> +    /* CAS/CAS2[WL] insns. (680[2346]0) */
> +    M68K_FEATURE_CAS,
> +    /* BKPT insn. (680[12346]0, and CPU32) */
> +    M68K_FEATURE_BKPT,
> +    /* RTD insn. (680[12346]0, and CPU32) */
> +    M68K_FEATURE_RTD,
> +    /* CHK2 insn. (680[2346]0, and CPU32) */
> +    M68K_FEATURE_CHK2,
> +    /* MOVEP insn. (680[01234]0, and CPU32) */
> +    M68K_FEATURE_MOVEP,
> +    /* MOVEC insn. (from 68010) */
> +    M68K_FEATURE_MOVEC,
>  };
>  
>  static inline int m68k_feature(CPUM68KState *env, int feature)
> 

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson March 9, 2021, 2:21 p.m. UTC | #2 
On 3/8/21 4:11 AM, Mark Cave-Ayland wrote:
> Move the feature comment from after the feature name to the preceding line to
> allow for longer feature names and descriptions without hitting the 80
> character line limit.
> 
> Signed-off-by: Mark Cave-Ayland<mark.cave-ayland@ilande.co.uk>
> ---

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
Laurent Vivier March 9, 2021, 7:46 p.m. UTC | #3 
Le 08/03/2021 à 13:11, Mark Cave-Ayland a écrit :
> Move the feature comment from after the feature name to the preceding line to
> allow for longer feature names and descriptions without hitting the 80
> character line limit.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
>  target/m68k/cpu.h | 66 +++++++++++++++++++++++++++++++----------------
>  1 file changed, 44 insertions(+), 22 deletions(-)
> 
> diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
> index 7c3feeaf8a..ce558e9b03 100644
> --- a/target/m68k/cpu.h
> +++ b/target/m68k/cpu.h
> @@ -475,36 +475,58 @@ void do_m68k_semihosting(CPUM68KState *env, int nr);
>   */
>  
>  enum m68k_features {
> -    M68K_FEATURE_M68000,   /* Base m68k instruction set */
> +    /* Base m68k instruction set */
> +    M68K_FEATURE_M68000,
>      M68K_FEATURE_M68010,
>      M68K_FEATURE_M68020,
>      M68K_FEATURE_M68030,
>      M68K_FEATURE_M68040,
>      M68K_FEATURE_M68060,
> -    M68K_FEATURE_CF_ISA_A, /* Base Coldfire set Rev A. */
> -    M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */
> -    M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
> -    M68K_FEATURE_BRAL, /* BRA with Long branch. (680[2346]0, ISA A+ or B). */
> +    /* Base Coldfire set Rev A. */
> +    M68K_FEATURE_CF_ISA_A,
> +    /* (ISA B or C). */
> +    M68K_FEATURE_CF_ISA_B,
> +    /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
> +    M68K_FEATURE_CF_ISA_APLUSC,
> +    /* BRA with Long branch. (680[2346]0, ISA A+ or B). */
> +    M68K_FEATURE_BRAL,
>      M68K_FEATURE_CF_FPU,
>      M68K_FEATURE_CF_MAC,
>      M68K_FEATURE_CF_EMAC,
> -    M68K_FEATURE_CF_EMAC_B,   /* Revision B EMAC (dual accumulate). */
> -    M68K_FEATURE_USP, /* User Stack Pointer. (680[012346]0, ISA A+, B or C).*/
> -    M68K_FEATURE_MSP, /* Master Stack Pointer. (680[234]0) */
> -    M68K_FEATURE_EXT_FULL,    /* 68020+ full extension word. */
> -    M68K_FEATURE_WORD_INDEX,  /* word sized address index registers. */
> -    M68K_FEATURE_SCALED_INDEX, /* scaled address index registers. */
> -    M68K_FEATURE_LONG_MULDIV, /* 32 bit mul/div. (680[2346]0, and CPU32) */
> -    M68K_FEATURE_QUAD_MULDIV, /* 64 bit mul/div. (680[2346]0, and CPU32) */
> -    M68K_FEATURE_BCCL,  /* Bcc with Long branches. (680[2346]0, and CPU32) */
> -    M68K_FEATURE_BITFIELD, /* BFxxx Bit field insns. (680[2346]0) */
> -    M68K_FEATURE_FPU,   /* fpu insn. (680[46]0) */
> -    M68K_FEATURE_CAS,   /* CAS/CAS2[WL] insns. (680[2346]0) */
> -    M68K_FEATURE_BKPT,  /* BKPT insn. (680[12346]0, and CPU32) */
> -    M68K_FEATURE_RTD,   /* RTD insn. (680[12346]0, and CPU32) */
> -    M68K_FEATURE_CHK2,  /* CHK2 insn. (680[2346]0, and CPU32) */
> -    M68K_FEATURE_MOVEP, /* MOVEP insn. (680[01234]0, and CPU32) */
> -    M68K_FEATURE_MOVEC, /* MOVEC insn. (from 68010) */
> +    /* Revision B EMAC (dual accumulate). */
> +    M68K_FEATURE_CF_EMAC_B,
> +    /* User Stack Pointer. (680[012346]0, ISA A+, B or C). */
> +    M68K_FEATURE_USP,
> +    /* Master Stack Pointer. (680[234]0) */
> +    M68K_FEATURE_MSP,
> +    /* 68020+ full extension word. */
> +    M68K_FEATURE_EXT_FULL,
> +    /* word sized address index registers. */
> +    M68K_FEATURE_WORD_INDEX,
> +    /* scaled address index registers. */
> +    M68K_FEATURE_SCALED_INDEX,
> +    /* 32 bit mul/div. (680[2346]0, and CPU32) */
> +    M68K_FEATURE_LONG_MULDIV,
> +    /* 64 bit mul/div. (680[2346]0, and CPU32) */
> +    M68K_FEATURE_QUAD_MULDIV,
> +    /* Bcc with Long branches. (680[2346]0, and CPU32) */
> +    M68K_FEATURE_BCCL,
> +    /* BFxxx Bit field insns. (680[2346]0) */
> +    M68K_FEATURE_BITFIELD,
> +    /* fpu insn. (680[46]0) */
> +    M68K_FEATURE_FPU,
> +    /* CAS/CAS2[WL] insns. (680[2346]0) */
> +    M68K_FEATURE_CAS,
> +    /* BKPT insn. (680[12346]0, and CPU32) */
> +    M68K_FEATURE_BKPT,
> +    /* RTD insn. (680[12346]0, and CPU32) */
> +    M68K_FEATURE_RTD,
> +    /* CHK2 insn. (680[2346]0, and CPU32) */
> +    M68K_FEATURE_CHK2,
> +    /* MOVEP insn. (680[01234]0, and CPU32) */
> +    M68K_FEATURE_MOVEP,
> +    /* MOVEC insn. (from 68010) */
> +    M68K_FEATURE_MOVEC,
>  };
>  
>  static inline int m68k_feature(CPUM68KState *env, int feature)
> 

Applied to my m68k-for-6.0 branch

Thanks,
Laurent
diff mbox series

Patch

diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 7c3feeaf8a..ce558e9b03 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -475,36 +475,58 @@  void do_m68k_semihosting(CPUM68KState *env, int nr);
  */
 
 enum m68k_features {
-    M68K_FEATURE_M68000,   /* Base m68k instruction set */
+    /* Base m68k instruction set */
+    M68K_FEATURE_M68000,
     M68K_FEATURE_M68010,
     M68K_FEATURE_M68020,
     M68K_FEATURE_M68030,
     M68K_FEATURE_M68040,
     M68K_FEATURE_M68060,
-    M68K_FEATURE_CF_ISA_A, /* Base Coldfire set Rev A. */
-    M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */
-    M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
-    M68K_FEATURE_BRAL, /* BRA with Long branch. (680[2346]0, ISA A+ or B). */
+    /* Base Coldfire set Rev A. */
+    M68K_FEATURE_CF_ISA_A,
+    /* (ISA B or C). */
+    M68K_FEATURE_CF_ISA_B,
+    /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
+    M68K_FEATURE_CF_ISA_APLUSC,
+    /* BRA with Long branch. (680[2346]0, ISA A+ or B). */
+    M68K_FEATURE_BRAL,
     M68K_FEATURE_CF_FPU,
     M68K_FEATURE_CF_MAC,
     M68K_FEATURE_CF_EMAC,
-    M68K_FEATURE_CF_EMAC_B,   /* Revision B EMAC (dual accumulate). */
-    M68K_FEATURE_USP, /* User Stack Pointer. (680[012346]0, ISA A+, B or C).*/
-    M68K_FEATURE_MSP, /* Master Stack Pointer. (680[234]0) */
-    M68K_FEATURE_EXT_FULL,    /* 68020+ full extension word. */
-    M68K_FEATURE_WORD_INDEX,  /* word sized address index registers. */
-    M68K_FEATURE_SCALED_INDEX, /* scaled address index registers. */
-    M68K_FEATURE_LONG_MULDIV, /* 32 bit mul/div. (680[2346]0, and CPU32) */
-    M68K_FEATURE_QUAD_MULDIV, /* 64 bit mul/div. (680[2346]0, and CPU32) */
-    M68K_FEATURE_BCCL,  /* Bcc with Long branches. (680[2346]0, and CPU32) */
-    M68K_FEATURE_BITFIELD, /* BFxxx Bit field insns. (680[2346]0) */
-    M68K_FEATURE_FPU,   /* fpu insn. (680[46]0) */
-    M68K_FEATURE_CAS,   /* CAS/CAS2[WL] insns. (680[2346]0) */
-    M68K_FEATURE_BKPT,  /* BKPT insn. (680[12346]0, and CPU32) */
-    M68K_FEATURE_RTD,   /* RTD insn. (680[12346]0, and CPU32) */
-    M68K_FEATURE_CHK2,  /* CHK2 insn. (680[2346]0, and CPU32) */
-    M68K_FEATURE_MOVEP, /* MOVEP insn. (680[01234]0, and CPU32) */
-    M68K_FEATURE_MOVEC, /* MOVEC insn. (from 68010) */
+    /* Revision B EMAC (dual accumulate). */
+    M68K_FEATURE_CF_EMAC_B,
+    /* User Stack Pointer. (680[012346]0, ISA A+, B or C). */
+    M68K_FEATURE_USP,
+    /* Master Stack Pointer. (680[234]0) */
+    M68K_FEATURE_MSP,
+    /* 68020+ full extension word. */
+    M68K_FEATURE_EXT_FULL,
+    /* word sized address index registers. */
+    M68K_FEATURE_WORD_INDEX,
+    /* scaled address index registers. */
+    M68K_FEATURE_SCALED_INDEX,
+    /* 32 bit mul/div. (680[2346]0, and CPU32) */
+    M68K_FEATURE_LONG_MULDIV,
+    /* 64 bit mul/div. (680[2346]0, and CPU32) */
+    M68K_FEATURE_QUAD_MULDIV,
+    /* Bcc with Long branches. (680[2346]0, and CPU32) */
+    M68K_FEATURE_BCCL,
+    /* BFxxx Bit field insns. (680[2346]0) */
+    M68K_FEATURE_BITFIELD,
+    /* fpu insn. (680[46]0) */
+    M68K_FEATURE_FPU,
+    /* CAS/CAS2[WL] insns. (680[2346]0) */
+    M68K_FEATURE_CAS,
+    /* BKPT insn. (680[12346]0, and CPU32) */
+    M68K_FEATURE_BKPT,
+    /* RTD insn. (680[12346]0, and CPU32) */
+    M68K_FEATURE_RTD,
+    /* CHK2 insn. (680[2346]0, and CPU32) */
+    M68K_FEATURE_CHK2,
+    /* MOVEP insn. (680[01234]0, and CPU32) */
+    M68K_FEATURE_MOVEP,
+    /* MOVEC insn. (from 68010) */
+    M68K_FEATURE_MOVEC,
 };
 
 static inline int m68k_feature(CPUM68KState *env, int feature)