From patchwork Wed Oct 23 15:00:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1182268 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="W7hUYkvB"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46yvhq2yCmz9sCJ for ; Thu, 24 Oct 2019 02:40:27 +1100 (AEDT) Received: from localhost ([::1]:39676 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iNIkK-0007Zq-Se for incoming@patchwork.ozlabs.org; Wed, 23 Oct 2019 11:40:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35406) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iNI8x-0008F7-08 for qemu-devel@nongnu.org; Wed, 23 Oct 2019 11:01:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iNI8s-0001Ic-BS for qemu-devel@nongnu.org; Wed, 23 Oct 2019 11:01:46 -0400 Received: from mail-qt1-x844.google.com ([2607:f8b0:4864:20::844]:40482) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iNI8s-0001BC-1G for qemu-devel@nongnu.org; Wed, 23 Oct 2019 11:01:42 -0400 Received: by mail-qt1-x844.google.com with SMTP id o49so24899748qta.7 for ; Wed, 23 Oct 2019 08:01:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=X22okviioTNDt7zI04Hhn7/Ba9cdRHpUwnG0LrTV7qc=; b=W7hUYkvBV4U84FkGgu5j4qdKyHLytPYVaAmgc1TcoF7kDY+hBgJktlSMHu+sOn8g8v 6j2aDHaY00/K32dfJPL8WYfJtG4JCQ3olPYZFb+7LrS6dlWB7SXkMRgIHCj9mebasoL3 nvSC2yN9Lsu+cyPMophx5upiL8QYj2jR0y9R7/xk49LkWcVJv0UDchl71MIj74mUk2HL GJVCqsBeYj4ytI5c8gMrf2CcO6NkTvHJ6e+eNrQq7m03xCHMOs1/5RVkH8YzxB07hI3i UFQSIbaqNeJALnezQuP1x8/VT1Xv51oTQswEnCSpxJScLmL+00Ykn81brw/Z821lJMKZ Ftyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=X22okviioTNDt7zI04Hhn7/Ba9cdRHpUwnG0LrTV7qc=; b=iVbz34qPHy+poOgbzXhKsrmI40gtO5VoQnHnFrohudynp7Wj26z3d3nYX/2i8K+7Ox /y3Jonlrrg4nm3MbcMBKeNC3lgfJEg6J1n2X3Z6pwLia179BHu1rAmz8YuCaG8SoyDfD 2c747v/joNZZ1xYz8YYRKyE8hP/xbyM9YBZp6ZHbYceaiuyM13qqQ9Pn0y8srfzZ/Mqq a2ymdexCXo6DbWAWBkmRUfxVDL+h7j20dVGlTRyD+2xswRTK/OVC3/tXpKONJ2yrYQCN igXkWnr6Gs6NBedmTIqE0GJiErRLOLSTRy9lGwFBXgLEBdfHxEXURGVxu+X5ovaniKym 15Kg== X-Gm-Message-State: APjAAAXbagvgJozcISCl5kSUB5U8Htk/GwjKX2VsbYOTrHIHGWlzkC0V J3i1LndJkvQYT+BhGAr+5Cx3bRiBXuw= X-Google-Smtp-Source: APXvYqzwMsqdinJ/S+z+oMWC3UdLEQNd1VjGgTpfl9fj+J99q/H/udX72efLIoZwIysab7KRXflctg== X-Received: by 2002:ac8:1194:: with SMTP id d20mr9752190qtj.275.1571842890760; Wed, 23 Oct 2019 08:01:30 -0700 (PDT) Received: from localhost.localdomain (198-4-20-64.static.cosmoweb.net. [64.20.4.198]) by smtp.gmail.com with ESMTPSA id l189sm11030168qke.69.2019.10.23.08.01.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2019 08:01:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v9 21/24] target/arm: Rebuild hflags for M-profile NVIC Date: Wed, 23 Oct 2019 11:00:54 -0400 Message-Id: <20191023150057.25731-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191023150057.25731-1-richard.henderson@linaro.org> References: <20191023150057.25731-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::844 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Continue setting, but not relying upon, env->hflags. Suggested-by: Peter Maydell Signed-off-by: Richard Henderson --- hw/intc/armv7m_nvic.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 8e93e51e81..e8c74f9eba 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -2251,7 +2251,7 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr addr, } } nvic_irq_update(s); - return MEMTX_OK; + goto exit_ok; case 0x200 ... 0x23f: /* NVIC Set pend */ /* the special logic in armv7m_nvic_set_pending() * is not needed since IRQs are never escalated @@ -2269,9 +2269,9 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr addr, } } nvic_irq_update(s); - return MEMTX_OK; + goto exit_ok; case 0x300 ... 0x33f: /* NVIC Active */ - return MEMTX_OK; /* R/O */ + goto exit_ok; /* R/O */ case 0x400 ... 0x5ef: /* NVIC Priority */ startvec = (offset - 0x400) + NVIC_FIRST_IRQ; /* vector # */ @@ -2281,10 +2281,10 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr addr, } } nvic_irq_update(s); - return MEMTX_OK; + goto exit_ok; case 0xd18 ... 0xd1b: /* System Handler Priority (SHPR1) */ if (!arm_feature(&s->cpu->env, ARM_FEATURE_M_MAIN)) { - return MEMTX_OK; + goto exit_ok; } /* fall through */ case 0xd1c ... 0xd23: /* System Handler Priority (SHPR2, SHPR3) */ @@ -2299,10 +2299,10 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr addr, set_prio(s, hdlidx, sbank, newprio); } nvic_irq_update(s); - return MEMTX_OK; + goto exit_ok; case 0xd28 ... 0xd2b: /* Configurable Fault Status (CFSR) */ if (!arm_feature(&s->cpu->env, ARM_FEATURE_M_MAIN)) { - return MEMTX_OK; + goto exit_ok; } /* All bits are W1C, so construct 32 bit value with 0s in * the parts not written by the access size @@ -2322,15 +2322,19 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr addr, */ s->cpu->env.v7m.cfsr[M_REG_NS] &= ~(value & R_V7M_CFSR_BFSR_MASK); } - return MEMTX_OK; + goto exit_ok; } if (size == 4) { nvic_writel(s, offset, value, attrs); - return MEMTX_OK; + goto exit_ok; } qemu_log_mask(LOG_GUEST_ERROR, "NVIC: Bad write of size %d at offset 0x%x\n", size, offset); /* This is UNPREDICTABLE; treat as RAZ/WI */ + + exit_ok: + /* Ensure any changes made are reflected in the cached hflags. */ + arm_rebuild_hflags(&s->cpu->env); return MEMTX_OK; }