From patchwork Thu Sep 26 15:17:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1167955 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46fJYn1j90z9sN1 for ; Fri, 27 Sep 2019 01:21:46 +1000 (AEST) Received: from localhost ([::1]:39156 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDVaP-0004Rp-Lh for incoming@patchwork.ozlabs.org; Thu, 26 Sep 2019 11:21:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52378) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDVX4-00035v-QS for qemu-devel@nongnu.org; Thu, 26 Sep 2019 11:18:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDVX3-0004bc-QX for qemu-devel@nongnu.org; Thu, 26 Sep 2019 11:18:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36388) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iDVX1-0004aI-Am; Thu, 26 Sep 2019 11:18:11 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6DBE9806CD; Thu, 26 Sep 2019 15:18:10 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.127]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 581475D6B0; Thu, 26 Sep 2019 15:17:57 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 02/11] hw/ide/piix: Convert reset handler to DeviceReset Date: Thu, 26 Sep 2019 17:17:24 +0200 Message-Id: <20190926151733.25349-3-philmd@redhat.com> In-Reply-To: <20190926151733.25349-1-philmd@redhat.com> References: <20190926151733.25349-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 26 Sep 2019 15:18:10 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Peter Maydell , qemu-block@nongnu.org, qemu-trivial@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Markus Armbruster , John Snow Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Convert the reset handler into a proper Device reset method. Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/piix.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/ide/piix.c b/hw/ide/piix.c index fba6bc8bff..18b2c3b722 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -30,7 +30,6 @@ #include "sysemu/block-backend.h" #include "sysemu/blockdev.h" #include "sysemu/dma.h" -#include "sysemu/reset.h" #include "hw/ide/pci.h" #include "trace.h" @@ -103,9 +102,9 @@ static void bmdma_setup_bar(PCIIDEState *d) } } -static void piix3_reset(void *opaque) +static void piix3_ide_reset(DeviceState *dev) { - PCIIDEState *d = opaque; + PCIIDEState *d = PCI_IDE(dev); PCIDevice *pd = PCI_DEVICE(d); uint8_t *pci_conf = pd->config; int i; @@ -154,8 +153,6 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error **errp) pci_conf[PCI_CLASS_PROG] = 0x80; // legacy ATA mode - qemu_register_reset(piix3_reset, d); - bmdma_setup_bar(d); pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar); @@ -247,6 +244,7 @@ static void piix3_ide_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + dc->reset = piix3_ide_reset; k->realize = pci_piix_ide_realize; k->exit = pci_piix_ide_exitfn; k->vendor_id = PCI_VENDOR_ID_INTEL;