From patchwork Fri Feb 22 14:10:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bastian Koppelmann X-Patchwork-Id: 1046911 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mail.uni-paderborn.de Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 445Z0S0glZz9s6w for ; Sat, 23 Feb 2019 01:46:16 +1100 (AEDT) Received: from localhost ([127.0.0.1]:51947 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gxC5d-0006pI-W7 for incoming@patchwork.ozlabs.org; Fri, 22 Feb 2019 09:46:14 -0500 Received: from eggs.gnu.org ([209.51.188.92]:41565) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gxBZo-0006VB-M5 for qemu-devel@nongnu.org; Fri, 22 Feb 2019 09:13:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gxBZi-0000ud-7L for qemu-devel@nongnu.org; Fri, 22 Feb 2019 09:13:16 -0500 Received: from mail.uni-paderborn.de ([131.234.142.9]:56740) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gxBZG-0006HR-Nr; Fri, 22 Feb 2019 09:12:52 -0500 Received: from pova.uni-paderborn.de ([131.234.189.23] helo=localhost.localdomain) by mail.uni-paderborn.de with esmtp (Exim 4.89 hoth) id 1gxBY0-0007vM-Rc; Fri, 22 Feb 2019 15:11:28 +0100 Received: from mail.uni-paderborn.de by pova with queue id 3166474-2; Fri, 22 Feb 2019 14:11:27 GMT X-Envelope-From: From: Bastian Koppelmann To: sagark@eecs.berkeley.edu, palmer@sifive.com, kbastian@mail.uni-paderborn.de Date: Fri, 22 Feb 2019 15:10:02 +0100 Message-Id: <20190222141024.22217-13-kbastian@mail.uni-paderborn.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190222141024.22217-1-kbastian@mail.uni-paderborn.de> References: <20190222141024.22217-1-kbastian@mail.uni-paderborn.de> MIME-Version: 1.0 X-PMX-Version: 6.4.6.2792898, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2019.2.22.140315, AntiVirus-Engine: 5.58.0, AntiVirus-Data: 2019.2.22.5580002 X-IMT-Spam-Score: 0.0 () X-IMT-Authenticated-Sender: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 131.234.142.9 Subject: [Qemu-devel] [PATCH v8 12/34] target/riscv: Convert RV64F insns to decodetree X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Alistair Francis , peer.adelt@hni.uni-paderborn.de, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Acked-by: Alistair Francis Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann Signed-off-by: Peer Adelt --- v7 -> v8: - add missing RVF checks target/riscv/insn32-64.decode | 6 +++ target/riscv/insn_trans/trans_rvf.inc.c | 60 +++++++++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index 0bee95c984..6319f872ac 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -56,3 +56,9 @@ amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st + +# *** RV64F Standard Extension (in addition to RV32F) *** +fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm +fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm +fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm +fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm diff --git a/target/riscv/insn_trans/trans_rvf.inc.c b/target/riscv/insn_trans/trans_rvf.inc.c index 0f83790349..172dbfa919 100644 --- a/target/riscv/insn_trans/trans_rvf.inc.c +++ b/target/riscv/insn_trans/trans_rvf.inc.c @@ -377,3 +377,63 @@ static bool trans_fmv_w_x(DisasContext *ctx, arg_fmv_w_x *a) return true; } + +#ifdef TARGET_RISCV64 +static bool trans_fcvt_l_s(DisasContext *ctx, arg_fcvt_l_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_l_s(t0, cpu_env, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + return true; +} + +static bool trans_fcvt_lu_s(DisasContext *ctx, arg_fcvt_lu_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_lu_s(t0, cpu_env, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + return true; +} + +static bool trans_fcvt_s_l(DisasContext *ctx, arg_fcvt_s_l *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_s_l(cpu_fpr[a->rd], cpu_env, t0); + + mark_fs_dirty(ctx); + tcg_temp_free(t0); + return true; +} + +static bool trans_fcvt_s_lu(DisasContext *ctx, arg_fcvt_s_lu *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_s_lu(cpu_fpr[a->rd], cpu_env, t0); + + mark_fs_dirty(ctx); + tcg_temp_free(t0); + return true; +} +#endif