| Message ID | 20181002142443.30976-10-damien.hedde@greensocs.com |
|---|---|
| State | New |
| Headers | show |
| Series | Clock framework API. | expand |
On 10/2/18 4:24 PM, Damien Hedde wrote: > Add the connection between the slcr's output clocks and the uarts inputs. > > Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> > --- > hw/arm/xilinx_zynq.c | 17 +++++++++++------ > 1 file changed, 11 insertions(+), 6 deletions(-) > > diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c > index f1496d2927..88f61c6a18 100644 > --- a/hw/arm/xilinx_zynq.c > +++ b/hw/arm/xilinx_zynq.c > @@ -166,7 +166,7 @@ static void zynq_init(MachineState *machine) > MemoryRegion *address_space_mem = get_system_memory(); > MemoryRegion *ext_ram = g_new(MemoryRegion, 1); > MemoryRegion *ocm_ram = g_new(MemoryRegion, 1); > - DeviceState *dev; > + DeviceState *dev, *slcr; > SysBusDevice *busdev; > qemu_irq pic[64]; > int n; > @@ -212,9 +212,10 @@ static void zynq_init(MachineState *machine) > 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, > 0); > > - dev = qdev_create(NULL, "xilinx,zynq_slcr"); > - qdev_init_nofail(dev); > - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8000000); > + /* Create slcr, keep a pointer to connect clocks */ > + slcr = qdev_create(NULL, "xilinx,zynq_slcr"); > + qdev_init_nofail(slcr); > + sysbus_mmio_map(SYS_BUS_DEVICE(slcr), 0, 0xF8000000); > > dev = qdev_create(NULL, TYPE_A9MPCORE_PRIV); > qdev_prop_set_uint32(dev, "num-cpu", 1); > @@ -235,8 +236,12 @@ static void zynq_init(MachineState *machine) > sysbus_create_simple("xlnx,ps7-usb", 0xE0002000, pic[53-IRQ_OFFSET]); > sysbus_create_simple("xlnx,ps7-usb", 0xE0003000, pic[76-IRQ_OFFSET]); > > - cadence_uart_create(0xE0000000, pic[59 - IRQ_OFFSET], serial_hd(0)); > - cadence_uart_create(0xE0001000, pic[82 - IRQ_OFFSET], serial_hd(1)); > + dev = cadence_uart_create(0xE0000000, pic[59 - IRQ_OFFSET], serial_hd(0)); > + qdev_connect_clock(dev, "busclk", slcr, "uart0_amba_clk", &error_abort); > + qdev_connect_clock(dev, "refclk", slcr, "uart0_ref_clk", &error_abort); > + dev = cadence_uart_create(0xE0001000, pic[82 - IRQ_OFFSET], serial_hd(1)); > + qdev_connect_clock(dev, "busclk", slcr, "uart1_amba_clk", &error_abort); > + qdev_connect_clock(dev, "refclk", slcr, "uart1_ref_clk", &error_abort); > > sysbus_create_varargs("cadence_ttc", 0xF8001000, > pic[42-IRQ_OFFSET], pic[43-IRQ_OFFSET], pic[44-IRQ_OFFSET], NULL); > Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index f1496d2927..88f61c6a18 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -166,7 +166,7 @@ static void zynq_init(MachineState *machine) MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *ext_ram = g_new(MemoryRegion, 1); MemoryRegion *ocm_ram = g_new(MemoryRegion, 1); - DeviceState *dev; + DeviceState *dev, *slcr; SysBusDevice *busdev; qemu_irq pic[64]; int n; @@ -212,9 +212,10 @@ static void zynq_init(MachineState *machine) 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, 0); - dev = qdev_create(NULL, "xilinx,zynq_slcr"); - qdev_init_nofail(dev); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8000000); + /* Create slcr, keep a pointer to connect clocks */ + slcr = qdev_create(NULL, "xilinx,zynq_slcr"); + qdev_init_nofail(slcr); + sysbus_mmio_map(SYS_BUS_DEVICE(slcr), 0, 0xF8000000); dev = qdev_create(NULL, TYPE_A9MPCORE_PRIV); qdev_prop_set_uint32(dev, "num-cpu", 1); @@ -235,8 +236,12 @@ static void zynq_init(MachineState *machine) sysbus_create_simple("xlnx,ps7-usb", 0xE0002000, pic[53-IRQ_OFFSET]); sysbus_create_simple("xlnx,ps7-usb", 0xE0003000, pic[76-IRQ_OFFSET]); - cadence_uart_create(0xE0000000, pic[59 - IRQ_OFFSET], serial_hd(0)); - cadence_uart_create(0xE0001000, pic[82 - IRQ_OFFSET], serial_hd(1)); + dev = cadence_uart_create(0xE0000000, pic[59 - IRQ_OFFSET], serial_hd(0)); + qdev_connect_clock(dev, "busclk", slcr, "uart0_amba_clk", &error_abort); + qdev_connect_clock(dev, "refclk", slcr, "uart0_ref_clk", &error_abort); + dev = cadence_uart_create(0xE0001000, pic[82 - IRQ_OFFSET], serial_hd(1)); + qdev_connect_clock(dev, "busclk", slcr, "uart1_amba_clk", &error_abort); + qdev_connect_clock(dev, "refclk", slcr, "uart1_ref_clk", &error_abort); sysbus_create_varargs("cadence_ttc", 0xF8001000, pic[42-IRQ_OFFSET], pic[43-IRQ_OFFSET], pic[44-IRQ_OFFSET], NULL);
Add the connection between the slcr's output clocks and the uarts inputs. Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> --- hw/arm/xilinx_zynq.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-)