From patchwork Sun Jun 24 04:06:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 933844 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="OUMgvQMw"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41Czgg1QKFz9s19 for ; Sun, 24 Jun 2018 14:23:11 +1000 (AEST) Received: from localhost ([::1]:40592 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWwYO-0007Y5-TW for incoming@patchwork.ozlabs.org; Sun, 24 Jun 2018 00:23:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42424) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWwIe-00044m-6s for qemu-devel@nongnu.org; Sun, 24 Jun 2018 00:06:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWwIZ-0003yk-F6 for qemu-devel@nongnu.org; Sun, 24 Jun 2018 00:06:52 -0400 Received: from mail-qk0-x230.google.com ([2607:f8b0:400d:c09::230]:34952) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWwIZ-0003xb-Aw; Sun, 24 Jun 2018 00:06:47 -0400 Received: by mail-qk0-x230.google.com with SMTP id u21-v6so244215qku.2; Sat, 23 Jun 2018 21:06:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lC2KgKibY6az3lIzgB/X94MigFbMELVxcth2+cI2ggM=; b=OUMgvQMw9RpMKChPiX/VVg+Uc2Y/7lzD8IUGIpsg5tQBM9TWGz+lUG4NdCQvASNc3a W89DO8qCeyrApzUlc+hB7W4a4O6m5lDK9BRj1lirop8FH8bacJplXZxeE16ceHubapKm 0p5s6obvEutfdVmSO9qssfOfpS/ej2lTWVQoSTaNsq1+jFp7llHuyRoMiXR6K1JMjK/e NZoBUMM/QzwfZPFOi1p7AJw6DZPsfJSTFeo66iOKxDK7ShvJBdJLXZyxjyQowRdmxxQC wG0FEWfVRShsPsa1206h8Vs3hQpmRO2KQ+QWUPx7IyTe7/SmG1fmorl08/8uXQM+gjLc tP/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=lC2KgKibY6az3lIzgB/X94MigFbMELVxcth2+cI2ggM=; b=S+UMVyYyBCo6qWpBKb1V2cPpIKoOP+Z6qA7+Y01uA8OR/ni8A/tv1vi2DIdlOFqbp6 HJdHRDf6wgCV0DxwR2BEsGhjBBomP9lVwxn6oX9mxiXw0Dr6+lsIzOlS2bI055uTpGd2 kyHTGBoafub4nVMHuk2TtR2lx6VmMnRYzhbU+kUeWga8jxbgiA1orYy/vSiLkbQWt22Z mw2NWJrsPgf+2pAQ58jfPGt6WAVP4QPKrvYWBguUbJn0fjjRBWxt2RPHYRcKgIKtFQtX RayrD/nexMLduX5/goBFUJj0WIBQwAreYfiS+n8v+IkApPA/j6qVPcfKMFXYiFLIJ8cl j5EQ== X-Gm-Message-State: APt69E3d7aMqfRZ+uNo/mRr9xqBlXABwzWLyceEdCHtmErbAvu5CYb8W IgRuCOyHF46lWjm0FMJfl3Y= X-Google-Smtp-Source: AAOMgpd2bykr/TZTIYfjXqQHtFG4xPP2O7/7rm7ZP2u07r1agBkLpdu3Fz8w2d0jseV8VYh1K9qn+g== X-Received: by 2002:a37:a4d1:: with SMTP id n200-v6mr999491qke.348.1529813206815; Sat, 23 Jun 2018 21:06:46 -0700 (PDT) Received: from x1.local ([138.117.48.222]) by smtp.gmail.com with ESMTPSA id d14-v6sm7145313qtn.90.2018.06.23.21.06.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 23 Jun 2018 21:06:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Peter Maydell , Thomas Huth Date: Sun, 24 Jun 2018 01:06:01 -0300 Message-Id: <20180624040609.17572-9-f4bug@amsat.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180624040609.17572-1-f4bug@amsat.org> References: <20180624040609.17572-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::230 Subject: [Qemu-devel] [PATCH v3 08/16] hw/arm/omap1: Use qemu_log_mask(GUEST_ERROR) instead of fprintf X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-trivial@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathi?= =?utf-8?b?ZXUtRGF1ZMOp?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" TCMI_VERBOSE is no more used, drop the OMAP_8/16/32B_REG macros. Suggested-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- include/hw/arm/omap.h | 18 ------------------ hw/arm/omap1.c | 18 ++++++++++++------ 2 files changed, 12 insertions(+), 24 deletions(-) diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index b398607b06..39abba753d 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -993,24 +993,6 @@ enum { #define OMAP_GPIOSW_INVERTED 0x0001 #define OMAP_GPIOSW_OUTPUT 0x0002 -# define TCMI_VERBOSE 1 - -# ifdef TCMI_VERBOSE -# define OMAP_8B_REG(paddr) \ - fprintf(stderr, "%s: 8-bit register " OMAP_FMT_plx "\n", \ - __func__, paddr) -# define OMAP_16B_REG(paddr) \ - fprintf(stderr, "%s: 16-bit register " OMAP_FMT_plx "\n", \ - __func__, paddr) -# define OMAP_32B_REG(paddr) \ - fprintf(stderr, "%s: 32-bit register " OMAP_FMT_plx "\n", \ - __func__, paddr) -# else -# define OMAP_8B_REG(paddr) -# define OMAP_16B_REG(paddr) -# define OMAP_32B_REG(paddr) -# endif - # define OMAP_MPUI_REG_MASK 0x000007ff #endif /* hw_omap_h */ diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 9af04728e3..539d29ef9c 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -34,12 +34,18 @@ #include "qemu/cutils.h" #include "qemu/bcd.h" +static inline void omap_log_badwidth(const char *funcname, hwaddr addr, int sz) +{ + qemu_log_mask(LOG_GUEST_ERROR, "%s: %d-bit register %#08" HWADDR_PRIx "\n", + funcname, 8 * sz, addr); +} + /* Should signal the TCMI/GPMC */ uint32_t omap_badwidth_read8(void *opaque, hwaddr addr) { uint8_t ret; - OMAP_8B_REG(addr); + omap_log_badwidth(__func__, addr, 1); cpu_physical_memory_read(addr, &ret, 1); return ret; } @@ -49,7 +55,7 @@ void omap_badwidth_write8(void *opaque, hwaddr addr, { uint8_t val8 = value; - OMAP_8B_REG(addr); + omap_log_badwidth(__func__, addr, 1); cpu_physical_memory_write(addr, &val8, 1); } @@ -57,7 +63,7 @@ uint32_t omap_badwidth_read16(void *opaque, hwaddr addr) { uint16_t ret; - OMAP_16B_REG(addr); + omap_log_badwidth(__func__, addr, 2); cpu_physical_memory_read(addr, &ret, 2); return ret; } @@ -67,7 +73,7 @@ void omap_badwidth_write16(void *opaque, hwaddr addr, { uint16_t val16 = value; - OMAP_16B_REG(addr); + omap_log_badwidth(__func__, addr, 2); cpu_physical_memory_write(addr, &val16, 2); } @@ -75,7 +81,7 @@ uint32_t omap_badwidth_read32(void *opaque, hwaddr addr) { uint32_t ret; - OMAP_32B_REG(addr); + omap_log_badwidth(__func__, addr, 4); cpu_physical_memory_read(addr, &ret, 4); return ret; } @@ -83,7 +89,7 @@ uint32_t omap_badwidth_read32(void *opaque, hwaddr addr) void omap_badwidth_write32(void *opaque, hwaddr addr, uint32_t value) { - OMAP_32B_REG(addr); + omap_log_badwidth(__func__, addr, 4); cpu_physical_memory_write(addr, &value, 4); }