diff mbox series

[v2,7/7] mips: update mips_cpu_list() to use object_class_get_list()

Message ID 20170830225225.27925-8-f4bug@amsat.org
State New
Headers show
Series [v2,1/7] mips: move hw/mips/cputimer.c to target/mips/ | expand

Commit Message

Philippe Mathieu-Daudé Aug. 30, 2017, 10:52 p.m. UTC 
while here, move it from translate_init.c to helper.c

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: James Hogan <james.hogan@imgtec.com>
---
 target/mips/helper.c         | 46 ++++++++++++++++++++++++++++++++++++++++++++
 target/mips/translate_init.c | 10 ----------
 2 files changed, 46 insertions(+), 10 deletions(-)

Comments

Eduardo Habkost Sept. 16, 2017, 12:20 a.m. UTC | #1 
On Wed, Aug 30, 2017 at 07:52:25PM -0300, Philippe Mathieu-Daudé wrote:
> while here, move it from translate_init.c to helper.c
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Tested-by: Igor Mammedov <imammedo@redhat.com>
> Tested-by: James Hogan <james.hogan@imgtec.com>
> ---
>  target/mips/helper.c         | 46 ++++++++++++++++++++++++++++++++++++++++++++
>  target/mips/translate_init.c | 10 ----------
>  2 files changed, 46 insertions(+), 10 deletions(-)
> 
> diff --git a/target/mips/helper.c b/target/mips/helper.c
> index ea076261af..8d12b0088a 100644
> --- a/target/mips/helper.c
> +++ b/target/mips/helper.c
> @@ -1093,3 +1093,49 @@ void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
>  
>      cpu_loop_exit_restore(cs, pc);
>  }
> +
> +/* Sort alphabetically by type name, except for "any". */
> +static gint mips_cpu_list_compare(gconstpointer a, gconstpointer b)
> +{
> +    ObjectClass *class_a = (ObjectClass *)a;
> +    ObjectClass *class_b = (ObjectClass *)b;
> +    const char *name_a, *name_b;
> +
> +    name_a = object_class_get_name(class_a);
> +    name_b = object_class_get_name(class_b);
> +    if (strcmp(name_a, "any-" TYPE_MIPS_CPU) == 0) {
> +        return 1;
> +    } else if (strcmp(name_b, "any-" TYPE_MIPS_CPU) == 0) {
> +        return -1;
> +    } else {
> +        return strcmp(name_a, name_b);
> +    }

This works, but I'd prefer to do like x86 and have a
MIPSCPUClass::ordering field.

(Or, even better: to add a generic CPUClass::ordering field so
all architectures can use the same method to order the model
list)

> +}
> +
> +static void mips_cpu_list_entry(gpointer data, gpointer user_data)
> +{
> +    ObjectClass *oc = data;
> +    CPUListState *s = user_data;
> +    const char *typename;
> +    char *name;
> +
> +    typename = object_class_get_name(oc);
> +    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_MIPS_CPU));
> +    (*s->cpu_fprintf)(s->file, "  %s\n", name);
> +    g_free(name);
> +}
> +
> +void mips_cpu_list(FILE *f, fprintf_function cpu_fprintf)
> +{
> +    CPUListState s = {
> +        .file = f,
> +        .cpu_fprintf = cpu_fprintf,
> +    };
> +    GSList *list;
> +
> +    list = object_class_get_list(TYPE_MIPS_CPU, false);
> +    list = g_slist_sort(list, mips_cpu_list_compare);
> +    (*cpu_fprintf)(f, "Available CPUs:\n");
> +    g_slist_foreach(list, mips_cpu_list_entry, &s);
> +    g_slist_free(list);
> +}

I think it's about time we implement a generic mechanism to list
CPU models using the QOM hierarchy, but this is out of the scope
of this series.


> diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
> index 8bbded46c4..b75f4c9065 100644
> --- a/target/mips/translate_init.c
> +++ b/target/mips/translate_init.c
> @@ -767,16 +767,6 @@ static const mips_def_t *cpu_mips_find_by_name (const char *name)
>      return NULL;
>  }
>  
> -void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf)
> -{
> -    int i;
> -
> -    for (i = 0; i < ARRAY_SIZE(mips_defs); i++) {
> -        (*cpu_fprintf)(f, "MIPS '%s'\n",
> -                       mips_defs[i].name);
> -    }
> -}
> -
>  #ifndef CONFIG_USER_ONLY
>  static void no_mmu_init (CPUMIPSState *env, const mips_def_t *def)
>  {
> -- 
> 2.14.1
> 
>
Philippe Mathieu-Daudé Sept. 17, 2017, 10:40 p.m. UTC | #2 
On 09/15/2017 09:20 PM, Eduardo Habkost wrote:
> On Wed, Aug 30, 2017 at 07:52:25PM -0300, Philippe Mathieu-Daudé wrote:
>> while here, move it from translate_init.c to helper.c
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> Tested-by: Igor Mammedov <imammedo@redhat.com>
>> Tested-by: James Hogan <james.hogan@imgtec.com>
>> ---
>>   target/mips/helper.c         | 46 ++++++++++++++++++++++++++++++++++++++++++++
>>   target/mips/translate_init.c | 10 ----------
>>   2 files changed, 46 insertions(+), 10 deletions(-)
>>
>> diff --git a/target/mips/helper.c b/target/mips/helper.c
>> index ea076261af..8d12b0088a 100644
>> --- a/target/mips/helper.c
>> +++ b/target/mips/helper.c
>> @@ -1093,3 +1093,49 @@ void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
>>   
>>       cpu_loop_exit_restore(cs, pc);
>>   }
>> +
>> +/* Sort alphabetically by type name, except for "any". */
>> +static gint mips_cpu_list_compare(gconstpointer a, gconstpointer b)
>> +{
>> +    ObjectClass *class_a = (ObjectClass *)a;
>> +    ObjectClass *class_b = (ObjectClass *)b;
>> +    const char *name_a, *name_b;
>> +
>> +    name_a = object_class_get_name(class_a);
>> +    name_b = object_class_get_name(class_b);
>> +    if (strcmp(name_a, "any-" TYPE_MIPS_CPU) == 0) {
>> +        return 1;
>> +    } else if (strcmp(name_b, "any-" TYPE_MIPS_CPU) == 0) {
>> +        return -1;
>> +    } else {
>> +        return strcmp(name_a, name_b);
>> +    }
> 
> This works, but I'd prefer to do like x86 and have a
> MIPSCPUClass::ordering field.
> 
> (Or, even better: to add a generic CPUClass::ordering field so
> all architectures can use the same method to order the model
> list)

I'll drop this patch, it is not required to QOMify MIPS CPU, and let 
another series properly refactor CPUClass::ordering.

> 
>> +}
>> +
>> +static void mips_cpu_list_entry(gpointer data, gpointer user_data)
>> +{
>> +    ObjectClass *oc = data;
>> +    CPUListState *s = user_data;
>> +    const char *typename;
>> +    char *name;
>> +
>> +    typename = object_class_get_name(oc);
>> +    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_MIPS_CPU));
>> +    (*s->cpu_fprintf)(s->file, "  %s\n", name);
>> +    g_free(name);
>> +}
>> +
>> +void mips_cpu_list(FILE *f, fprintf_function cpu_fprintf)
>> +{
>> +    CPUListState s = {
>> +        .file = f,
>> +        .cpu_fprintf = cpu_fprintf,
>> +    };
>> +    GSList *list;
>> +
>> +    list = object_class_get_list(TYPE_MIPS_CPU, false);
>> +    list = g_slist_sort(list, mips_cpu_list_compare);
>> +    (*cpu_fprintf)(f, "Available CPUs:\n");
>> +    g_slist_foreach(list, mips_cpu_list_entry, &s);
>> +    g_slist_free(list);
>> +}
> 
> I think it's about time we implement a generic mechanism to list
> CPU models using the QOM hierarchy, but this is out of the scope
> of this series.
> 
> 
>> diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
>> index 8bbded46c4..b75f4c9065 100644
>> --- a/target/mips/translate_init.c
>> +++ b/target/mips/translate_init.c
>> @@ -767,16 +767,6 @@ static const mips_def_t *cpu_mips_find_by_name (const char *name)
>>       return NULL;
>>   }
>>   
>> -void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf)
>> -{
>> -    int i;
>> -
>> -    for (i = 0; i < ARRAY_SIZE(mips_defs); i++) {
>> -        (*cpu_fprintf)(f, "MIPS '%s'\n",
>> -                       mips_defs[i].name);
>> -    }
>> -}
>> -
>>   #ifndef CONFIG_USER_ONLY
>>   static void no_mmu_init (CPUMIPSState *env, const mips_def_t *def)
>>   {
>> -- 
>> 2.14.1
>>
>>
>
diff mbox series

Patch

diff --git a/target/mips/helper.c b/target/mips/helper.c
index ea076261af..8d12b0088a 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -1093,3 +1093,49 @@  void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
 
     cpu_loop_exit_restore(cs, pc);
 }
+
+/* Sort alphabetically by type name, except for "any". */
+static gint mips_cpu_list_compare(gconstpointer a, gconstpointer b)
+{
+    ObjectClass *class_a = (ObjectClass *)a;
+    ObjectClass *class_b = (ObjectClass *)b;
+    const char *name_a, *name_b;
+
+    name_a = object_class_get_name(class_a);
+    name_b = object_class_get_name(class_b);
+    if (strcmp(name_a, "any-" TYPE_MIPS_CPU) == 0) {
+        return 1;
+    } else if (strcmp(name_b, "any-" TYPE_MIPS_CPU) == 0) {
+        return -1;
+    } else {
+        return strcmp(name_a, name_b);
+    }
+}
+
+static void mips_cpu_list_entry(gpointer data, gpointer user_data)
+{
+    ObjectClass *oc = data;
+    CPUListState *s = user_data;
+    const char *typename;
+    char *name;
+
+    typename = object_class_get_name(oc);
+    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_MIPS_CPU));
+    (*s->cpu_fprintf)(s->file, "  %s\n", name);
+    g_free(name);
+}
+
+void mips_cpu_list(FILE *f, fprintf_function cpu_fprintf)
+{
+    CPUListState s = {
+        .file = f,
+        .cpu_fprintf = cpu_fprintf,
+    };
+    GSList *list;
+
+    list = object_class_get_list(TYPE_MIPS_CPU, false);
+    list = g_slist_sort(list, mips_cpu_list_compare);
+    (*cpu_fprintf)(f, "Available CPUs:\n");
+    g_slist_foreach(list, mips_cpu_list_entry, &s);
+    g_slist_free(list);
+}
diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
index 8bbded46c4..b75f4c9065 100644
--- a/target/mips/translate_init.c
+++ b/target/mips/translate_init.c
@@ -767,16 +767,6 @@  static const mips_def_t *cpu_mips_find_by_name (const char *name)
     return NULL;
 }
 
-void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf)
-{
-    int i;
-
-    for (i = 0; i < ARRAY_SIZE(mips_defs); i++) {
-        (*cpu_fprintf)(f, "MIPS '%s'\n",
-                       mips_defs[i].name);
-    }
-}
-
 #ifndef CONFIG_USER_ONLY
 static void no_mmu_init (CPUMIPSState *env, const mips_def_t *def)
 {