From patchwork Fri Sep 18 18:25:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kevin O'Connor X-Patchwork-Id: 519510 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id AA25B1400B7 for ; Sat, 19 Sep 2015 04:25:37 +1000 (AEST) Received: from localhost ([::1]:41067 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zd0Ln-0004za-Cw for incoming@patchwork.ozlabs.org; Fri, 18 Sep 2015 14:25:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36216) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zd0LT-0004iX-Ci for qemu-devel@nongnu.org; Fri, 18 Sep 2015 14:25:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zd0LP-0004aJ-E2 for qemu-devel@nongnu.org; Fri, 18 Sep 2015 14:25:15 -0400 Received: from mail-qg0-f54.google.com ([209.85.192.54]:33963) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zd0LP-0004a7-Az for qemu-devel@nongnu.org; Fri, 18 Sep 2015 14:25:11 -0400 Received: by qgez77 with SMTP id z77so45812066qge.1 for ; Fri, 18 Sep 2015 11:25:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-type:content-disposition :content-transfer-encoding:in-reply-to:user-agent; bh=XYtEcozavvrZYZiRr0XTqGNZA7yYkrTZVG8tvzqNegA=; b=mj1QqgVE3he+oa0ILiAsAZtO1RTs3jw16gUb+FmSXrhjOXN6UqT3ximfAbPoWy4urQ catOqqBPvou5D3F7B9ygvN61Zc3QHR3zAw5Sl+QAXDPBlstcZdxsl103jEorY1mJjRdd gyC/L4a2c+DvqwXRBBw+afz3NAHMDi6G9XUNxnlKcikY8A1vKDCS6NVAN5abQbW0uorI dHxMkpx8qSaLDkZq0Ri0xIpBj+xllMe127LgyFEm7YEx0KAKaj6z+eKfzcPsVE7dXLHE 03M/LG7BjHNk3ac8MafmdQ148x6bRZVI29rj8GClcDMDKX0yNU1K5g7uivd7n230bdnO RbUw== X-Gm-Message-State: ALoCoQlCF6woIlMIgJW04rZyXyHsU4jNKd6pG9Ybhj8xiCKznzPqBwS0g7DfIto7Cpv7LVlVNDPg X-Received: by 10.140.237.72 with SMTP id i69mr8636747qhc.56.1442600710499; Fri, 18 Sep 2015 11:25:10 -0700 (PDT) Received: from localhost (209-122-232-221.c3-0.avec-ubr1.nyr-avec.ny.cable.rcn.com. [209.122.232.221]) by smtp.gmail.com with ESMTPSA id t37sm828116qge.26.2015.09.18.11.25.09 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Sep 2015 11:25:09 -0700 (PDT) Date: Fri, 18 Sep 2015 14:25:09 -0400 From: Kevin O'Connor To: Marc =?iso-8859-1?Q?Mar=ED?= Message-ID: <20150918182509.GA13450@morn.lan> References: <1442566703-5091-1-git-send-email-markmb@redhat.com> <1442566729-5133-1-git-send-email-markmb@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1442566729-5133-1-git-send-email-markmb@redhat.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.192.54 Cc: Stefan Hajnoczi , Drew , Laszlo , qemu-devel@nongnu.org, Gerd Hoffmann Subject: Re: [Qemu-devel] [PATCH v3 0/5] fw_cfg DMA interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On Fri, Sep 18, 2015 at 10:58:44AM +0200, Marc Marí wrote: > Implement host-side of the FW CFG DMA interface both for x86 and ARM. > > Based on Gerd Hoffman's initial implementation. Thanks for working on this Marc! Any chance you could add the patch below to the series (or merge it into your series)? The patch adds a signature to the DMA address IO register. With the current implementation, a future firmware would have to implement the V1 fw_cfg interface just to probe for the dma interface. It might be useful if future firmwares (that don't care about backwards compatibility with old versions of qemu) could probe for the dma fw_cfg interface by just checking for a signature (and therefore not require all the V1 code just to probe). -Kevin commit ae6d8df012ef9b21ae17bfb0383d116f71ba1d58 Author: Kevin O'Connor Date: Fri Sep 18 14:14:55 2015 -0400 fw_cfg: Define a static signature to be returned on DMA port reads Return a static signature ("QEMU CFG") if the guest does a read to the DMA address io register. Signed-off-by: Kevin O'Connor diff --git a/docs/specs/fw_cfg.txt b/docs/specs/fw_cfg.txt index d5f9ddd..5bf3f65 100644 --- a/docs/specs/fw_cfg.txt +++ b/docs/specs/fw_cfg.txt @@ -93,6 +93,10 @@ by selecting the "signature" item using key 0x0000 (FW_CFG_SIGNATU RE), and reading four bytes from the data register. If the fw_cfg device is present, the four bytes read will contain the characters "QEMU". +Additionaly, if the DMA interface is available then a read to the DMA +Address will return 0x51454d5520434647 ("QEMU CFG" in big-endian +format). + === Revision / feature bitmap (Key 0x0001, FW_CFG_ID) === A 32-bit little-endian unsigned int, this item is used to check for enabled diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index d11d8c5..d95075d 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -53,6 +53,8 @@ #define FW_CFG_DMA_CTL_SKIP 0x04 #define FW_CFG_DMA_CTL_SELECT 0x08 +#define FW_CFG_DMA_SIGNATURE 0x51454d5520434647 /* "QEMU CFG" */ + typedef struct FWCfgEntry { uint32_t len; uint8_t *data; @@ -393,6 +395,12 @@ static void fw_cfg_dma_transfer(FWCfgState *s) trace_fw_cfg_read(s, 0); } +static uint64_t fw_cfg_dma_mem_read(void *opaque, hwaddr addr, + unsigned size) +{ + return FW_CFG_DMA_SIGNATURE >> ((8 - addr - size) * 8); +} + static void fw_cfg_dma_mem_write(void *opaque, hwaddr addr, uint64_t value, unsigned size) { @@ -416,8 +424,8 @@ static void fw_cfg_dma_mem_write(void *opaque, hwaddr addr, static bool fw_cfg_dma_mem_valid(void *opaque, hwaddr addr, unsigned size, bool is_write) { - return is_write && ((size == 4 && (addr == 0 || addr == 4)) || - (size == 8 && addr == 0)); + return !is_write || ((size == 4 && (addr == 0 || addr == 4)) || + (size == 8 && addr == 0)); } static bool fw_cfg_data_mem_valid(void *opaque, hwaddr addr, @@ -488,6 +496,7 @@ static const MemoryRegionOps fw_cfg_comb_mem_ops = { }; static const MemoryRegionOps fw_cfg_dma_mem_ops = { + .read = fw_cfg_dma_mem_read, .write = fw_cfg_dma_mem_write, .endianness = DEVICE_BIG_ENDIAN, .valid.accepts = fw_cfg_dma_mem_valid,