From patchwork Wed May 6 16:20:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: penghao122@sina.com X-Patchwork-Id: 469103 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5BB2A1402B5 for ; Thu, 7 May 2015 04:07:29 +1000 (AEST) Received: from localhost ([::1]:46631 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yq3jB-0008KW-1h for incoming@patchwork.ozlabs.org; Wed, 06 May 2015 14:07:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57958) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yq3iq-00080x-Mo for qemu-devel@nongnu.org; Wed, 06 May 2015 14:07:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yq3il-0008NJ-RF for qemu-devel@nongnu.org; Wed, 06 May 2015 14:07:04 -0400 Received: from mail2-190.sinamail.sina.com.cn ([60.28.2.190]:48763 helo=smtp2911-211.mail.sina.com.cn) by eggs.gnu.org with smtp (Exim 4.71) (envelope-from ) id 1Yq3il-0008MU-8P for qemu-devel@nongnu.org; Wed, 06 May 2015 14:06:59 -0400 Received: from unknown( HELO webmail.sinamail.sina.com.cn)([172.16.201.35]) by sina.com with SMTP 7 May 2015 00:20:11 +0800 (CST) X-Sender: penghao122@sina.com X-SMAIL-MID: 6231059061711 Received: by webmail.sinamail.sina.com.cn (Postfix, from userid 80) id 55A5049ED81; Thu, 7 May 2015 00:20:11 +0800 (CST) Date: Thu, 07 May 2015 00:20:11 +0800 Received: from penghao122@sina.com([218.89.219.79]) by m0.mail.sina.com.cn via HTTP; Thu, 07 May 2015 00:20:11 +0800 (CST) From: To: "qemu-devel" MIME-Version: 1.0 X-Priority: 3 X-MessageID: 554a3f3b206217 X-Originating-IP: [172.16.201.35] X-Mailer: Sina WebMail 4.0 Message-Id: <20150506162011.55A5049ED81@webmail.sinamail.sina.com.cn> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 60.28.2.190 Cc: qemu-stable Subject: [Qemu-devel] [PATCH] keyboard:fix ps2 keyboard can't use X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list Reply-To: penghao122@sina.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Starting a linux guest with ps2 keyboard, if you type many times during leaving grub and into linux kernel,then you can't use keyboard after linux initialization finished. Specally when you setup linux guest from iso file,you will type in grub. During grub,the work method of ps2 keyboard is like this: First, ps2 keyboard driver send command KBD_CCMD_KBD_ENABLE. Second, if there is a keyboard input, then ps2 keyboard driver read data. Third, ps2 keyboard driver send command KBD_CCMD_KBD_ENABLE again. After leaving grub and before finishing linux kernel ps2 driver initialization, if you type many times, the input data keep saving in ps2 queue of qemu. Before linux kernel initialize ps2 keyboard,linux call i8042_controller_check, if i8042_controller_check return fail, then ps2 keyboard driver will never initialize. (i8042.c in kernel 2.6.32 ) static int i8042_controller_check(void) { if (i8042_flush() == I8042_BUFFER_SIZE) return -ENODEV; return 0; } static int i8042_flush(void) { ... while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) { udelay(50); data = i8042_read_data(); i++; } return i; } During calling i8042_flush it is full in ps2 queue of qemu. ps_read_data will execute kbd_update_irq(s->update_arg, q->count != 0). Because q->count!=0, kbd_update_irq can set I8042_STR_OBF. Then i8042_flush() will return I8042_BUFFER_SIZE. Signed-off-by: Hao Peng ---- diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index 9b9a7d7..f4fbcfc 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -207,6 +207,8 @@ static uint64_t kbd_read_status(void *opaque, hwaddr addr, KBDState *s = opaque; int val; val = s->status; + if(s->write-cmd == KBD_CCMD_KBD_ENABLE) + val &= ~KBD_STAT_OBF; DPRINTF("kbd: read status=0x%02x\n", val); return val; } @@ -251,9 +253,10 @@ static void kbd_write_command(void *opaque, hwaddr addr, else val = KBD_CCMD_NO_OP; } - + s->write_cmd = 0; switch(val) { case KBD_CCMD_READ_MODE: + ps2_clear_queue(s->kbd); kbd_queue(s, s->mode, 0); break; case KBD_CCMD_WRITE_MODE: @@ -284,6 +287,7 @@ static void kbd_write_command(void *opaque, hwaddr addr, kbd_update_irq(s); break; case KBD_CCMD_KBD_ENABLE: + s->write_cmd = KBD_CCMD_KBD_ENABLE; s->mode &= ~KBD_MODE_DISABLE_KBD; kbd_update_irq(s); break; @@ -364,7 +368,11 @@ static void kbd_write_data(void *opaque, hwaddr addr, default: break; } - s->write_cmd = 0; + + if(s->write_cmd == KBD_CCMD_WRITE_MODE && s->mode == 0x61) + s->write_cmd == KBD_CCMD_KBD_ENABLE; + else + s->write_cmd = 0; } static void kbd_reset(void *opaque) diff --git a/hw/input/ps2.c b/hw/input/ps2.c index 4baeea2..f3580c1 100644 --- a/hw/input/ps2.c +++ b/hw/input/ps2.c @@ -150,7 +150,12 @@ void ps2_queue(void *opaque, int b) q->count++; s->update_irq(s->update_arg, 1); } - +void ps2_clear_queue(void *opaque) +{ + PS2State *s = (PS2State *)opaque; + PS2Queue *q = &s->queue; + q->wptr = q->rptr = q->count = 0; +} /* keycode is expressed as follow: bit 7 - 0 key pressed, 1 = key released diff --git a/include/hw/input/ps2.h b/include/hw/input/ps2.h index 7c45ce7..7bd9158 100644 --- a/include/hw/input/ps2.h +++ b/include/hw/input/ps2.h @@ -32,6 +32,7 @@ void ps2_write_mouse(void *, int val); void ps2_write_keyboard(void *, int val); uint32_t ps2_read_data(void *); void ps2_queue(void *, int b); +void ps2_clear_queue(void *opaque); void ps2_keyboard_set_translation(void *opaque, int mode); void ps2_mouse_fake_event(void *opaque);