From patchwork Mon Mar 16 20:08:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Emilio Cota X-Patchwork-Id: 450735 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id C0F5614010F for ; Tue, 17 Mar 2015 07:07:28 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="verification failed; unprotected key" header.d=braap.org header.i=@braap.org header.b=AUMzw1RL; dkim-adsp=none (unprotected policy); dkim-atps=neutral Received: from localhost ([::1]:51460 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YXbIL-0006Ut-He for incoming@patchwork.ozlabs.org; Mon, 16 Mar 2015 16:07:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47105) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YXbI1-00064B-7p for qemu-devel@nongnu.org; Mon, 16 Mar 2015 16:07:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YXbHw-0004Yt-Aj for qemu-devel@nongnu.org; Mon, 16 Mar 2015 16:07:05 -0400 Received: from out3-smtp.messagingengine.com ([66.111.4.27]:38571) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YXbHw-0004Yp-1t for qemu-devel@nongnu.org; Mon, 16 Mar 2015 16:07:00 -0400 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 947D02131D for ; Mon, 16 Mar 2015 16:06:57 -0400 (EDT) Received: from frontend2 ([10.202.2.161]) by compute3.internal (MEProxy); Mon, 16 Mar 2015 16:06:59 -0400 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=braap.org; h= x-sasl-enc:date:from:to:cc:subject:message-id:references :mime-version:content-type:in-reply-to; s=mesmtp; bh=biTaUkrwq2O ktA6xr4DqxB5aruw=; b=AUMzw1RLt9qIBWlB+SHRwWI8Nda0yUh1ZimtGl3/lIX ECOAQvX6SCMQe1RQzv9qUyeYAzc2YCnA36xJqwYB8B1GOJrkHZLSggTT8SQclvjf KPpZQMY5/nuZu6+bxMcx3Ym8CybT3ISPIyLih9bSpRWRlj4Luw2LWRstFxuVe5b8 = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d= messagingengine.com; h=x-sasl-enc:date:from:to:cc:subject :message-id:references:mime-version:content-type:in-reply-to; s= smtpout; bh=biTaUkrwq2OktA6xr4DqxB5aruw=; b=Q2TqTdJhswZtHUA70GVj EzZSxNLxOhUKx6AassnAoqYFQd1cj1O8ZS3EDQn3qbknkpVrp4PARdm0C5pUbkef 4HBU9TXtASLrDCQXvJ3Vcqad9JJtRupYsgs+p9uvHUWdxCuA98hsNYjN+BMYu2Oi 7s7Bj9SdyeVMVqLCObksPPI= X-Sasl-enc: CPNCWS9adxXLTgBL451ly/F2oiPTz1v8/5dwd3d2uOyS 1426536419 Received: from localhost (unknown [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 54AA3680106; Mon, 16 Mar 2015 16:06:59 -0400 (EDT) Date: Mon, 16 Mar 2015 16:08:37 -0400 From: "Emilio G. Cota" To: Richard Henderson Message-ID: <20150316200837.GA30330@flamenco> References: <20150315100051.GA26584@flamenco> <5506115D.9070908@twiddle.net> <20150316004231.GA13273@flamenco> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20150316004231.GA13273@flamenco> User-Agent: Mutt/1.5.21 (2010-09-15) X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 66.111.4.27 Cc: Peter Maydell , qemu-devel Subject: Re: [Qemu-devel] [qemu] How to reliably obtain physaddr from vaddr X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On Sun, Mar 15, 2015 at 20:42:31 -0400, Emilio G. Cota wrote: > On Sun, Mar 15, 2015 at 16:10:21 -0700, Richard Henderson wrote: > > It goes into softmmu_template.h. Which then tests a victim tlb, and finally > > calls tlb_fill. You'll probably need to do the same. > > I've defined this vaddr->paddr as a helper and I'm calling it > before every aa32 store. However, this isn't a smooth sailing: > > 1. futex_init in the kernel causes an oops--it passes vaddr=0 > but the call happens with pagefaults disabled: > http://lxr.free-electrons.com/source/kernel/futex.c?v=3.18#L590 > in the code below I'm just returning to avoid the oops. Please disregard this point--the oops doesn't happen with the code I appended (it was triggered by previous iterations of it). > 2. The kernel (vexpress-a9 from buildroot) doesn't boot. Removing the call to tlb_fill() on a TLB miss solves the problem. But of course this also means the helper doesn't work as intended. I fail to see why calling tlb_fill() from the helper causes trouble. What I thought would happen is that the exception (if any) is started from the helper, gets serviced, and then both the helper and the subsequent store hit in the TLB. I was seeing this as a "TLB prefetch", but I cannot make it work. What am I missing? FWIW I'm appending the delta wrt my previous email. Thanks, Emilio diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h index 39cde9d..48c54f9 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -140,14 +140,6 @@ glue(cpu_st_paddr, MEMSUFFIX)(CPUArchState *env, target_ulong ptr) hwaddr ret; addr = ptr; - /* - * XXX Understand why this is necessary. - * futex_init on linux bootup calls cmpxchg on a NULL pointer. It expects - * -EFAULT to be read back, but when we do the below we get a kernel oops. - * However, when doing the load from TCG -EFAULT is read just fine--no oops. - */ - if (unlikely(addr == 0)) - return 0; page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx = CPU_MMU_INDEX; if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write != diff --git a/softmmu_template.h b/softmmu_template.h index 172b718..1b6655e 100644 --- a/softmmu_template.h +++ b/softmmu_template.h @@ -476,7 +476,7 @@ hwaddr helper_ret_st_paddr(CPUArchState *env, target_ulong addr, if ((addr & TARGET_PAGE_MASK) != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { if (!VICTIM_TLB_HIT(addr_write)) { - tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr); + return 0; } } return env->tlb_table[mmu_idx][index].addr_phys;