| Message ID | 20120322100150.44393.57388.stgit@amd-6168-8-1.englab.nay.redhat.com |
|---|---|
| State | New |
| Headers | show |
diff --git a/hw/e1000.c b/hw/e1000.c index 7babc0b..dd6a97d 100644 --- a/hw/e1000.c +++ b/hw/e1000.c @@ -234,7 +234,10 @@ set_mdic(E1000State *s, int index, uint32_t val) s->phy_reg[addr] = data; } s->mac_reg[MDIC] = val | E1000_MDIC_READY; - set_ics(s, 0, E1000_ICR_MDAC); + + if (val & E1000_MDIC_INT_EN) { + set_ics(s, 0, E1000_ICR_MDAC); + } } static uint32_t
According to the spec: "When set to 1b by software, it causes an Interrupt to be asserted to indicate the end of an MDI cycle." We need check the Interrupt Enable bit and raise irq only when it is set. Signed-off-by: Jason Wang <jasowang@redhat.com> --- hw/e1000.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)