From patchwork Thu Nov 26 15:48:39 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael S. Tsirkin" X-Patchwork-Id: 39565 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B5DB3B7B69 for ; Fri, 27 Nov 2009 03:57:15 +1100 (EST) Received: from localhost ([127.0.0.1]:54055 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NDhea-0003o8-3j for incoming@patchwork.ozlabs.org; Thu, 26 Nov 2009 11:57:12 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NDgi2-0004CU-Lw for qemu-devel@nongnu.org; Thu, 26 Nov 2009 10:56:42 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NDghx-00045n-Ck for qemu-devel@nongnu.org; Thu, 26 Nov 2009 10:56:42 -0500 Received: from [199.232.76.173] (port=58401 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NDghx-00045Q-5x for qemu-devel@nongnu.org; Thu, 26 Nov 2009 10:56:37 -0500 Received: from mx1.redhat.com ([209.132.183.28]:4066) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NDghw-0001qb-MT for qemu-devel@nongnu.org; Thu, 26 Nov 2009 10:56:37 -0500 Received: from int-mx08.intmail.prod.int.phx2.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.21]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id nAQFpIUR005391 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 26 Nov 2009 10:51:18 -0500 Received: from redhat.com (vpn-6-32.tlv.redhat.com [10.35.6.32]) by int-mx08.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with SMTP id nAQFpFmO017022; Thu, 26 Nov 2009 10:51:16 -0500 Date: Thu, 26 Nov 2009 17:48:39 +0200 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org, anthony@codemonkey.ws, yamahata@valinux.co.jp, paul@codesourcery.com, quintela@redhat.com Message-ID: <20091126154839.GC2694@redhat.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.19 (2009-01-05) X-Scanned-By: MIMEDefang 2.67 on 10.5.11.21 X-detected-operating-system: by monty-python.gnu.org: Genre and OS details not recognized. Cc: Subject: [Qemu-devel] [PATCHv2 2/3] pci: interrupt status bit implementation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org interrupt status is a mandatory feature in PCI spec, so devices must implement it to be spec compliant. Signed-off-by: Michael S. Tsirkin --- hw/pci.c | 26 +++++++++++++++++++++++++- hw/pci.h | 1 + 2 files changed, 26 insertions(+), 1 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 1eb51f8..f83ea93 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -128,11 +128,23 @@ static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change) bus->set_irq(bus->irq_opaque, irq_num, bus->irq_count[irq_num] != 0); } +/* Update interrupt status bit in config space on interrupt + * state change. */ +static void pci_update_irq_status(PCIDevice *dev) +{ + if (dev->irq_state) { + dev->config[PCI_STATUS] |= PCI_STATUS_INTERRUPT; + } else { + dev->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT; + } +} + static void pci_device_reset(PCIDevice *dev) { int r; dev->irq_state = 0; + pci_update_irq_status(dev); dev->config[PCI_COMMAND] &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); dev->config[PCI_CACHE_LINE_SIZE] = 0x0; @@ -379,12 +391,23 @@ static inline const VMStateDescription *pci_get_vmstate(PCIDevice *s) void pci_device_save(PCIDevice *s, QEMUFile *f) { + /* Clear interrupt status bit: it is implicit + * in irq_state which we are saving. + * This makes us compatible with old devices + * which never set or clear this bit. */ + s->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT; vmstate_save_state(f, pci_get_vmstate(s), s); + /* Restore the interrupt status bit. */ + pci_update_irq_status(s); } int pci_device_load(PCIDevice *s, QEMUFile *f) { - return vmstate_load_state(f, pci_get_vmstate(s), s, s->version_id); + int ret; + ret = vmstate_load_state(f, pci_get_vmstate(s), s, s->version_id); + /* Restore the interrupt status bit. */ + pci_update_irq_status(s); + return ret; } static int pci_set_default_subsystem_id(PCIDevice *pci_dev) @@ -957,6 +980,7 @@ static void pci_set_irq(void *opaque, int irq_num, int level) return; pci_set_irq_state(pci_dev, irq_num, level); + pci_update_irq_status(pci_dev); pci_change_irq_level(pci_dev, irq_num, change); } diff --git a/hw/pci.h b/hw/pci.h index ebf6c39..dc9b860 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -102,6 +102,7 @@ typedef struct PCIIORegion { #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ #define PCI_COMMAND_MASTER 0x4 /* Enable bus master */ #define PCI_STATUS 0x06 /* 16 bits */ +#define PCI_STATUS_INTERRUPT 0x08 #define PCI_REVISION_ID 0x08 /* 8 bits */ #define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */ #define PCI_CLASS_DEVICE 0x0a /* Device class */