From patchwork Thu Jun 17 21:52:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taylor Simpson X-Patchwork-Id: 1493976 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=quicinc.com header.i=@quicinc.com header.a=rsa-sha256 header.s=qcdkim header.b=wij4eseu; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4G5bRD2pWRz9sRN for ; Fri, 18 Jun 2021 07:53:42 +1000 (AEST) Received: from localhost ([::1]:39674 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltzxC-00055n-Qz for incoming@patchwork.ozlabs.org; Thu, 17 Jun 2021 17:53:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36094) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltzwQ-00055P-1R for qemu-devel@nongnu.org; Thu, 17 Jun 2021 17:52:50 -0400 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:58027) by eggs.gnu.org with esmtps (TLS1.2:RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1ltzwN-0006ef-Ln for qemu-devel@nongnu.org; Thu, 17 Jun 2021 17:52:49 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1623966767; x=1655502767; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=w/AzGUoAOWhhZzSJA5kHl52py6VYG1u6F0h/rs1/LIE=; b=wij4eseuR5aJuitCCPpYRRw5fRd6HSNKI5e0lwadaRUdnGYeIPGymDPt Lt2xy9wsGhxkH9DW50RESEyh1+uAI8SsXxNCuunsAu3DY8CgolBBJzLuh husiIPA+1eZmYnqS3cdejOL8cINNiwwODrVL53HfNQiIK1/42C15LFoJl o=; Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-02.qualcomm.com with ESMTP; 17 Jun 2021 14:52:44 -0700 X-QCInternal: smtphost Received: from vu-tsimpson-aus.qualcomm.com (HELO vu-tsimpson1-aus.qualcomm.com) ([10.222.150.1]) by ironmsg05-sd.qualcomm.com with ESMTP; 17 Jun 2021 14:52:43 -0700 Received: by vu-tsimpson1-aus.qualcomm.com (Postfix, from userid 47164) id B57E2F43; Thu, 17 Jun 2021 16:52:43 -0500 (CDT) From: Taylor Simpson To: tsimpson@quicinc.com Subject: [PULL 2/4] Hexagon (target/hexagon) fix l2fetch instructions Date: Thu, 17 Jun 2021 16:52:33 -0500 Message-Id: <1623966755-30225-3-git-send-email-tsimpson@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1623966755-30225-1-git-send-email-tsimpson@quicinc.com> References: <1623966755-30225-1-git-send-email-tsimpson@quicinc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=199.106.114.39; envelope-from=tsimpson@qualcomm.com; helo=alexa-out-sd-02.qualcomm.com X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:All patches CC here" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Y4_l2fetch == l2fetch(Rs32, Rt32) Y5_l2fetch == l2fetch(Rs32, Rtt32) The semantics for these instructions are present, but the encodings are missing. Note that these are treated as nops in qemu, so we add overrides. Test case added to tests/tcg/hexagon/misc.c Reviewed-by: Richard Henderson > Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h | 11 +++++++++++ tests/tcg/hexagon/misc.c | 9 +++++++++ target/hexagon/imported/encode_pp.def | 3 +++ 3 files changed, 23 insertions(+) diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h index 18fcdbc..a375d6a 100644 --- a/target/hexagon/gen_tcg.h +++ b/target/hexagon/gen_tcg.h @@ -734,4 +734,15 @@ #define fGEN_TCG_F2_dfmpyhh(SHORTCODE) \ gen_helper_dfmpyhh(RxxV, cpu_env, RxxV, RssV, RttV) +/* Nothing to do for these in qemu, need to suppress compiler warnings */ +#define fGEN_TCG_Y4_l2fetch(SHORTCODE) \ + do { \ + RsV = RsV; \ + RtV = RtV; \ + } while (0) +#define fGEN_TCG_Y5_l2fetch(SHORTCODE) \ + do { \ + RsV = RsV; \ + } while (0) + #endif diff --git a/tests/tcg/hexagon/misc.c b/tests/tcg/hexagon/misc.c index 9e139f3..f0b1947 100644 --- a/tests/tcg/hexagon/misc.c +++ b/tests/tcg/hexagon/misc.c @@ -326,6 +326,13 @@ void test_lsbnew(void) check(result, 5); } +void test_l2fetch(void) +{ + /* These don't do anything in qemu, just make sure they don't assert */ + asm volatile ("l2fetch(r0, r1)\n\t" + "l2fetch(r0, r3:2)\n\t"); +} + int main() { int res; @@ -459,6 +466,8 @@ int main() test_lsbnew(); + test_l2fetch(); + puts(err ? "FAIL" : "PASS"); return err; } diff --git a/target/hexagon/imported/encode_pp.def b/target/hexagon/imported/encode_pp.def index 35ae3d2..939c6fc 100644 --- a/target/hexagon/imported/encode_pp.def +++ b/target/hexagon/imported/encode_pp.def @@ -493,6 +493,9 @@ DEF_ENC32(Y2_dccleana, ICLASS_ST" 000 00 00sssss PP------ --------") DEF_ENC32(Y2_dcinva, ICLASS_ST" 000 00 01sssss PP------ --------") DEF_ENC32(Y2_dccleaninva, ICLASS_ST" 000 00 10sssss PP------ --------") +DEF_ENC32(Y4_l2fetch, ICLASS_ST" 011 00 00sssss PP-ttttt 000-----") +DEF_ENC32(Y5_l2fetch, ICLASS_ST" 011 01 00sssss PP-ttttt --------") + /*******************************/ /* */ /* */