diff mbox series

[v2,1/2] hw/ppc: e500: Use a macro for the platform clock frequency

Message ID 1612362288-22216-1-git-send-email-bmeng.cn@gmail.com
State New
Headers show
Series [v2,1/2] hw/ppc: e500: Use a macro for the platform clock frequency | expand

Commit Message

Bin Meng Feb. 3, 2021, 2:24 p.m. UTC
From: Bin Meng <bin.meng@windriver.com>

At present the platform clock frequency is using a magic number.
Convert it to a macro and use it everywhere.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

---

Changes in v2:
- Rename the macro per Philippe's comments

 hw/ppc/e500.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

Comments

David Gibson Feb. 4, 2021, 2:59 a.m. UTC | #1
On Wed, Feb 03, 2021 at 10:24:47PM +0800, Bin Meng wrote:
> From: Bin Meng <bin.meng@windriver.com>
> 
> At present the platform clock frequency is using a magic number.
> Convert it to a macro and use it everywhere.
> 
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Applied to ppc-for-6.0, thanks.

> 
> ---
> 
> Changes in v2:
> - Rename the macro per Philippe's comments
> 
>  hw/ppc/e500.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index c64b5d0..c795276 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -74,6 +74,8 @@
>  #define MPC8544_I2C_IRQ            43
>  #define RTC_REGS_OFFSET            0x68
>  
> +#define PLATFORM_CLK_FREQ_HZ       (400 * 1000 * 1000)
> +
>  struct boot_info
>  {
>      uint32_t dt_base;
> @@ -320,8 +322,8 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
>      int fdt_size;
>      void *fdt;
>      uint8_t hypercall[16];
> -    uint32_t clock_freq = 400000000;
> -    uint32_t tb_freq = 400000000;
> +    uint32_t clock_freq = PLATFORM_CLK_FREQ_HZ;
> +    uint32_t tb_freq = PLATFORM_CLK_FREQ_HZ;
>      int i;
>      char compatible_sb[] = "fsl,mpc8544-immr\0simple-bus";
>      char *soc;
> @@ -890,7 +892,7 @@ void ppce500_init(MachineState *machine)
>          env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
>          env->mpic_iack = pmc->ccsrbar_base + MPC8544_MPIC_REGS_OFFSET + 0xa0;
>  
> -        ppc_booke_timers_init(cpu, 400000000, PPC_TIMER_E500);
> +        ppc_booke_timers_init(cpu, PLATFORM_CLK_FREQ_HZ, PPC_TIMER_E500);
>  
>          /* Register reset handler */
>          if (!i) {
diff mbox series

Patch

diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index c64b5d0..c795276 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -74,6 +74,8 @@ 
 #define MPC8544_I2C_IRQ            43
 #define RTC_REGS_OFFSET            0x68
 
+#define PLATFORM_CLK_FREQ_HZ       (400 * 1000 * 1000)
+
 struct boot_info
 {
     uint32_t dt_base;
@@ -320,8 +322,8 @@  static int ppce500_load_device_tree(PPCE500MachineState *pms,
     int fdt_size;
     void *fdt;
     uint8_t hypercall[16];
-    uint32_t clock_freq = 400000000;
-    uint32_t tb_freq = 400000000;
+    uint32_t clock_freq = PLATFORM_CLK_FREQ_HZ;
+    uint32_t tb_freq = PLATFORM_CLK_FREQ_HZ;
     int i;
     char compatible_sb[] = "fsl,mpc8544-immr\0simple-bus";
     char *soc;
@@ -890,7 +892,7 @@  void ppce500_init(MachineState *machine)
         env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
         env->mpic_iack = pmc->ccsrbar_base + MPC8544_MPIC_REGS_OFFSET + 0xa0;
 
-        ppc_booke_timers_init(cpu, 400000000, PPC_TIMER_E500);
+        ppc_booke_timers_init(cpu, PLATFORM_CLK_FREQ_HZ, PPC_TIMER_E500);
 
         /* Register reset handler */
         if (!i) {