diff mbox series

[1/4] target/riscv: Make csr_ops[CSR_TABLE_SIZE] external

Message ID 1610427124-49887-2-git-send-email-bmeng.cn@gmail.com
State New
Headers show
Series target/riscv: Generate the GDB XML file for CSR registers dynamically | expand

Commit Message

Bin Meng Jan. 12, 2021, 4:52 a.m. UTC
From: Bin Meng <bin.meng@windriver.com>

In preparation to generate the CSR register list for GDB stub
dynamically, change csr_ops[] to non-static so that it can be
referenced externally.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
---

 target/riscv/cpu.h |  8 ++++++++
 target/riscv/csr.c | 10 +---------
 2 files changed, 9 insertions(+), 9 deletions(-)

Comments

Alistair Francis Jan. 15, 2021, 9:49 p.m. UTC | #1
On Mon, Jan 11, 2021 at 8:53 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> In preparation to generate the CSR register list for GDB stub
> dynamically, change csr_ops[] to non-static so that it can be
> referenced externally.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>
>  target/riscv/cpu.h |  8 ++++++++
>  target/riscv/csr.c | 10 +---------
>  2 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 2649949..6f9e1cc 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -482,6 +482,14 @@ typedef struct {
>      riscv_csr_op_fn op;
>  } riscv_csr_operations;
>
> +/* CSR function table constants */
> +enum {
> +    CSR_TABLE_SIZE = 0x1000
> +};
> +
> +/* CSR function table */
> +extern riscv_csr_operations csr_ops[];
> +
>  void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops);
>  void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops);
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 10ab82e..507e8ee 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -23,14 +23,6 @@
>  #include "qemu/main-loop.h"
>  #include "exec/exec-all.h"
>
> -/* CSR function table */
> -static riscv_csr_operations csr_ops[];
> -
> -/* CSR function table constants */
> -enum {
> -    CSR_TABLE_SIZE = 0x1000
> -};
> -
>  /* CSR function table public API */
>  void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops)
>  {
> @@ -1378,7 +1370,7 @@ int riscv_csrrw_debug(CPURISCVState *env, int csrno, target_ulong *ret_value,
>  }
>
>  /* Control and Status Register function table */
> -static riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
> +riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
>      /* User Floating-Point CSRs */
>      [CSR_FFLAGS] =              { fs,   read_fflags,      write_fflags      },
>      [CSR_FRM] =                 { fs,   read_frm,         write_frm         },
> --
> 2.7.4
>
>
Richard Henderson Jan. 18, 2021, 5:55 p.m. UTC | #2
On 1/11/21 6:52 PM, Bin Meng wrote:
> +extern riscv_csr_operations csr_ops[];

You might as well use CSR_TABLE_SIZE here.

Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
Bin Meng Jan. 19, 2021, 2:41 a.m. UTC | #3
On Tue, Jan 19, 2021 at 1:55 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 1/11/21 6:52 PM, Bin Meng wrote:
> > +extern riscv_csr_operations csr_ops[];
>
> You might as well use CSR_TABLE_SIZE here.
>

OK, I will send a patch for this. Thanks!

> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Regards,
Bin
diff mbox series

Patch

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 2649949..6f9e1cc 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -482,6 +482,14 @@  typedef struct {
     riscv_csr_op_fn op;
 } riscv_csr_operations;
 
+/* CSR function table constants */
+enum {
+    CSR_TABLE_SIZE = 0x1000
+};
+
+/* CSR function table */
+extern riscv_csr_operations csr_ops[];
+
 void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops);
 void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops);
 
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 10ab82e..507e8ee 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -23,14 +23,6 @@ 
 #include "qemu/main-loop.h"
 #include "exec/exec-all.h"
 
-/* CSR function table */
-static riscv_csr_operations csr_ops[];
-
-/* CSR function table constants */
-enum {
-    CSR_TABLE_SIZE = 0x1000
-};
-
 /* CSR function table public API */
 void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops)
 {
@@ -1378,7 +1370,7 @@  int riscv_csrrw_debug(CPURISCVState *env, int csrno, target_ulong *ret_value,
 }
 
 /* Control and Status Register function table */
-static riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
+riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
     /* User Floating-Point CSRs */
     [CSR_FFLAGS] =              { fs,   read_fflags,      write_fflags      },
     [CSR_FRM] =                 { fs,   read_frm,         write_frm         },