From patchwork Fri Sep 6 19:12:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 1159180 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amd.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amdcloud.onmicrosoft.com header.i=@amdcloud.onmicrosoft.com header.b="iOu1Y+QO"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46Q6hd2sHpz9sPP for ; Sat, 7 Sep 2019 05:15:29 +1000 (AEST) Received: from localhost ([::1]:59542 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i6Jhe-00052k-J1 for incoming@patchwork.ozlabs.org; Fri, 06 Sep 2019 15:15:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42305) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i6JeZ-0002Hp-Md for qemu-devel@nongnu.org; Fri, 06 Sep 2019 15:12:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i6JeY-0004AI-B5 for qemu-devel@nongnu.org; Fri, 06 Sep 2019 15:12:15 -0400 Received: from mail-eopbgr690045.outbound.protection.outlook.com ([40.107.69.45]:54799 helo=NAM04-CO1-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i6JeY-00049w-2N for qemu-devel@nongnu.org; Fri, 06 Sep 2019 15:12:14 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=LUigJfDDHpPDHaxobHl2i3gnAkp5c8A5qG/qDJBZOcA9g+VOXGuIgUU/PXWp2j3PGY+TE0dakMcsJirv9JEuypPqKQ/Cr2GZgdKiVPwVyqBE0aoI2YRgdr6qMVvyqnf/ihc7Vn7FDuOkIg3khqDbsmZUiA87lj9gLjcb6/OnTbvJD6hI+zOZLKSxnpGfftehSsJupl7K+BV+au4rx5OknMQdkPAyGfFwkh2N1V3Mc30iHs0rCPMOnnnYDAntyoo91ZOae7wzmMpyUlSVPDbdiaZvzN13ZQqDWUZ94lAS4NpifJL/EnNkQkT2Dp/hNnEMbCmDPIJmmOEX3uVeCc9I2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=14QLFjvQBrNxUaohTnVwAQR+VjaFhSqb3YwVUHKmKhE=; b=i4Lf95nWBj8ate66kwjensnzgbWkbs5/3WnwpIm44t5jLgmIAVg7cq3SB+kldvtP/0tNCZJ5cbAoMyXY//WRu0Fftz944FRTVF8vZiJTDAQDmEfDurDb+v+Kzd3B/f2Ug1Iwf4OiDcqLfg+LTb20BSSFTgvi1rO9igh8S/7YeyVg8RRtiV/q/8SeTSI4tQps6VDZSKW8Y3Qpw4CGKwtVz06QoMOqQ8FXbtIFmM2ZtXVacFztMUGfAfj4oMk2xcixCMUWO5HI4u3gsZ7E2BMe/xG6QdjVUWk1dVyOBR6rbBjg7AS1B+4llDp2plqjp3EAugN8Fbactp+Imr+2Av4QTw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=14QLFjvQBrNxUaohTnVwAQR+VjaFhSqb3YwVUHKmKhE=; b=iOu1Y+QO6WKsqGbOOM8OzgCnKJSFLfk0UBV+9oUxand3CDFIJSYRH9Wjwxpwn/Sg/lL2zJ1tvdC0N5AncjHuP+VAhVlBlqIBiTvlUuaoLtO6E1OH59LoycUL2GJbnkLINQLtVZDHxK3n5ZijRmh1p+V0Iv7fZuoAvOIPl4a/36o= Received: from DM5PR12MB2471.namprd12.prod.outlook.com (52.132.141.138) by DM5PR12MB1145.namprd12.prod.outlook.com (10.168.238.141) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2241.14; Fri, 6 Sep 2019 19:12:11 +0000 Received: from DM5PR12MB2471.namprd12.prod.outlook.com ([fe80::6c7c:4b6d:f136:1bf8]) by DM5PR12MB2471.namprd12.prod.outlook.com ([fe80::6c7c:4b6d:f136:1bf8%3]) with mapi id 15.20.2220.022; Fri, 6 Sep 2019 19:12:11 +0000 From: "Moger, Babu" To: ssg.sos.staff , "ehabkost@redhat.com" , "marcel.apfelbaum@gmail.com" , "mst@redhat.com" , "pbonzini@redhat.com" , "rth@twiddle.net" , "eblake@redhat.com" , "armbru@redhat.com" , "imammedo@redhat.com" Thread-Topic: [RFC 2 PATCH 05/16] hw/i386: Simplify topology Offset/width Calculation Thread-Index: AQHVZOb89qmGH/MzAkO4cTQpzupvOA== Date: Fri, 6 Sep 2019 19:12:11 +0000 Message-ID: <156779713027.21957.5884599223662351252.stgit@localhost.localdomain> References: <156779689013.21957.1631551572950676212.stgit@localhost.localdomain> In-Reply-To: <156779689013.21957.1631551572950676212.stgit@localhost.localdomain> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN4PR0601CA0015.namprd06.prod.outlook.com (2603:10b6:803:2f::25) To DM5PR12MB2471.namprd12.prod.outlook.com (2603:10b6:4:b5::10) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Babu.Moger@amd.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [165.204.78.1] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c7641158-64bb-4190-3b93-08d732fe1ec7 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600166)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:DM5PR12MB1145; x-ms-traffictypediagnostic: DM5PR12MB1145: x-ld-processed: 3dd8961f-e488-4e60-8e11-a82d994e183d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:4303; x-forefront-prvs: 0152EBA40F x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(4636009)(376002)(396003)(366004)(39860400002)(136003)(346002)(199004)(189003)(2201001)(71190400001)(305945005)(7736002)(9686003)(52116002)(86362001)(71200400001)(6116002)(8936002)(6512007)(3846002)(6436002)(11346002)(103116003)(99286004)(6506007)(6486002)(26005)(4326008)(14454004)(5660300002)(386003)(476003)(102836004)(2906002)(25786009)(76176011)(2501003)(53936002)(8676002)(66446008)(446003)(186003)(66556008)(486006)(66946007)(66476007)(64756008)(110136005)(81166006)(81156014)(478600001)(66066001)(256004)(316002); DIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR12MB1145; H:DM5PR12MB2471.namprd12.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: Pk2AoBckym3iYEZaiGZIEvUZALThVcF/HzIrb4cDSd71qmqWAynwBGHvoLc47FxB6Y8khMlVKj1SwjE7QsF50GdcpVyg5lRnUt3i9PeYFtq7lY7JwPbTD2GXQdkO0dd33bqOPBTs9fJOo3Mnl0nUrY502V+Fb4kq8CmnqDsvB5IgKCgQYf5vWbjt1u/ulpQtupjmtswJAP7umVrfwIguSGPRp/UpUHWQkUx0xEIBEioCwaCcqYoi0UM/ymP1IziIUggVYbYOjwMdt/ZnOibdJZjRIo0kYp4UOGuXJL0msShEABjjC0ZmTD7wp7ZTMgS2Q26mFYEr3LnskkvtUvjnUM1Mr79qH76LdJ2sl+dsnUxpTaAse9i2tIY59D9T9sjt3FheJD4Q3lVRKDCGEjTRs+ePu/BRZUYTfD9Nqu86tHQ= Content-ID: <9E22E9CBBC317849A6482A2B7F00F961@namprd12.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: c7641158-64bb-4190-3b93-08d732fe1ec7 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Sep 2019 19:12:11.6929 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: AMLEvSU0+QPGJnzYed0rawAxwV7SiOSeI3avgf4dSEK4xpJHhf7XKnZWVjcZlPbo X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1145 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 40.107.69.45 Subject: [Qemu-devel] [RFC 2 PATCH 05/16] hw/i386: Simplify topology Offset/width Calculation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "qemu-devel@nongnu.org" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Some parameters are unnecessarily passed for offset/width calculation. Remove those parameters from function prototypes. No functional change. Signed-off-by: Babu Moger --- include/hw/i386/topology.h | 45 ++++++++++++++++++-------------------------- target/i386/cpu.c | 12 ++++-------- 2 files changed, 22 insertions(+), 35 deletions(-) diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 906017e8e3..fb10863a66 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -73,46 +73,37 @@ static unsigned apicid_bitwidth_for_count(unsigned count) /* Bit width of the SMT_ID (thread ID) field on the APIC ID */ -static inline unsigned apicid_smt_width(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_smt_width(unsigned nr_threads) { return apicid_bitwidth_for_count(nr_threads); } /* Bit width of the Core_ID field */ -static inline unsigned apicid_core_width(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_core_width(unsigned nr_cores) { return apicid_bitwidth_for_count(nr_cores); } /* Bit width of the Die_ID field */ -static inline unsigned apicid_die_width(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_die_width(unsigned nr_dies) { return apicid_bitwidth_for_count(nr_dies); } /* Bit offset of the Core_ID field */ -static inline unsigned apicid_core_offset(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_core_offset(unsigned nr_threads) { - return apicid_smt_width(nr_dies, nr_cores, nr_threads); + return apicid_smt_width(nr_threads); } /* Bit offset of the Die_ID field */ -static inline unsigned apicid_die_offset(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_die_offset(unsigned nr_cores, + unsigned nr_threads) { - return apicid_core_offset(nr_dies, nr_cores, nr_threads) + - apicid_core_width(nr_dies, nr_cores, nr_threads); + return apicid_core_offset(nr_threads) + + apicid_core_width(nr_cores); } /* Bit offset of the Pkg_ID (socket ID) field @@ -121,8 +112,8 @@ static inline unsigned apicid_pkg_offset(unsigned nr_dies, unsigned nr_cores, unsigned nr_threads) { - return apicid_die_offset(nr_dies, nr_cores, nr_threads) + - apicid_die_width(nr_dies, nr_cores, nr_threads); + return apicid_die_offset(nr_cores, nr_threads) + + apicid_die_width(nr_dies); } /* Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID @@ -137,8 +128,8 @@ static inline apic_id_t apicid_from_topo_ids(X86CPUTopoInfo *topo_info, unsigned nr_threads = topo_info->nr_threads; return (topo_ids->pkg_id << apicid_pkg_offset(nr_dies, nr_cores, nr_threads)) | - (topo_ids->die_id << apicid_die_offset(nr_dies, nr_cores, nr_threads)) | - (topo_ids->core_id << apicid_core_offset(nr_dies, nr_cores, nr_threads)) | + (topo_ids->die_id << apicid_die_offset(nr_cores, nr_threads)) | + (topo_ids->core_id << apicid_core_offset(nr_threads)) | topo_ids->smt_id; } @@ -171,13 +162,13 @@ static inline void x86_topo_ids_from_apicid(apic_id_t apicid, unsigned nr_threads = topo_info->nr_threads; topo_ids->smt_id = apicid & - ~(0xFFFFFFFFUL << apicid_smt_width(nr_dies, nr_cores, nr_threads)); + ~(0xFFFFFFFFUL << apicid_smt_width(nr_threads)); topo_ids->core_id = - (apicid >> apicid_core_offset(nr_dies, nr_cores, nr_threads)) & - ~(0xFFFFFFFFUL << apicid_core_width(nr_dies, nr_cores, nr_threads)); + (apicid >> apicid_core_offset(nr_threads)) & + ~(0xFFFFFFFFUL << apicid_core_width(nr_cores)); topo_ids->die_id = - (apicid >> apicid_die_offset(nr_dies, nr_cores, nr_threads)) & - ~(0xFFFFFFFFUL << apicid_die_width(nr_dies, nr_cores, nr_threads)); + (apicid >> apicid_die_offset(nr_cores, nr_threads)) & + ~(0xFFFFFFFFUL << apicid_die_width(nr_dies)); topo_ids->pkg_id = apicid >> apicid_pkg_offset(nr_dies, nr_cores, nr_threads); } diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 19751e37a7..6d7f9b6b8b 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4260,8 +4260,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, eax, ebx, ecx, edx); break; case 3: /* L3 cache info */ - die_offset = apicid_die_offset(env->nr_dies, - cs->nr_cores, cs->nr_threads); + die_offset = apicid_die_offset(cs->nr_cores, cs->nr_threads); if (cpu->enable_l3_cache) { encode_cache_cpuid4(env->cache_info_cpuid4.l3_cache, (1 << die_offset), cs->nr_cores, @@ -4346,8 +4345,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, switch (count) { case 0: - *eax = apicid_core_offset(env->nr_dies, - cs->nr_cores, cs->nr_threads); + *eax = apicid_core_offset(cs->nr_threads); *ebx = cs->nr_threads; *ecx |= CPUID_TOPOLOGY_LEVEL_SMT; break; @@ -4377,14 +4375,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *edx = cpu->apic_id; switch (count) { case 0: - *eax = apicid_core_offset(env->nr_dies, cs->nr_cores, - cs->nr_threads); + *eax = apicid_core_offset(cs->nr_threads); *ebx = cs->nr_threads; *ecx |= CPUID_TOPOLOGY_LEVEL_SMT; break; case 1: - *eax = apicid_die_offset(env->nr_dies, cs->nr_cores, - cs->nr_threads); + *eax = apicid_die_offset(cs->nr_cores, cs->nr_threads); *ebx = cs->nr_cores * cs->nr_threads; *ecx |= CPUID_TOPOLOGY_LEVEL_CORE; break;