diff mbox series

[v6,39/77] target/mips: Add emulation of DSP ASE for nanoMIPS - part 2

Message ID 1533219424-7627-40-git-send-email-stefan.markovic@rt-rk.com
State New
Headers show
Series Add nanoMIPS support to QEMU | expand

Commit Message

Stefan Markovic Aug. 2, 2018, 2:16 p.m. UTC 
From: Stefan Markovic <smarkovic@wavecomp.com>

Add emulation of DSP ASE instructions for nanoMIPS - part 2.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
---
 target/mips/translate.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Aleksandar Markovic Aug. 3, 2018, 11:20 a.m. UTC | #1 
> +                case NM_BPOSGE32C:
> +                    check_dsp(ctx);
> +                    {
> +                        int32_t imm = extract32(ctx->opcode, 1, 13) |
> +                                      extract32(ctx->opcode, 0, 1) << 13;
> +
> +                        gen_compute_branch(ctx, OPC_BPOSGE32, 4, -1, -2,
> +                                           imm, 4);
> +                    }
> +                    break;


BPOSGE32C is introduced in DSP-R3. Shouldn't there be check_dspr3(), and applied here?

From the code, it turns out that the only difference between BPOSGE32 (supported in previous mips DSP specifications) and BPOSGE32C (nanoMIPS DSP supported) is offset calculation. Is this really the only difference - from the documentation?

Aleksandar M.
Stefan Markovic Aug. 3, 2018, 2:06 p.m. UTC | #2 
BPOSGE32C is introduced in DSP-R3. Shouldn't there be check_dspr3(), and applied here?


You're right. DSPR3 is not supported in QEMU at the moment.
Patch with DSP Revision 3 support will be included in next version of patch set.


From the code, it turns out that the only difference between BPOSGE32 (supported in previous mips DSP specifications) and BPOSGE32C (nanoMIPS DSP supported) is offset calculation. Is this really the only difference - from the documentation?


Yes, the only difference is offset calculation.


Regards,

Stefan
diff mbox series

Patch

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 07690b4..06707ac 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -18792,6 +18792,16 @@  static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
                 case NM_BC1NEZC:
                     gen_compute_branch1_r6(ctx, OPC_BC1NEZ, rt, s, 0);
                     break;
+                case NM_BPOSGE32C:
+                    check_dsp(ctx);
+                    {
+                        int32_t imm = extract32(ctx->opcode, 1, 13) |
+                                      extract32(ctx->opcode, 0, 1) << 13;
+
+                        gen_compute_branch(ctx, OPC_BPOSGE32, 4, -1, -2,
+                                           imm, 4);
+                    }
+                    break;
                 default:
                     generate_exception_end(ctx, EXCP_RI);
                     break;