From patchwork Fri Feb 17 06:31:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vijay Kilari X-Patchwork-Id: 729024 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vPjxx0sFVz9s7n for ; Fri, 17 Feb 2017 17:37:41 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="E0g2ST4V"; dkim-atps=neutral Received: from localhost ([::1]:51793 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cecAk-00053S-MB for incoming@patchwork.ozlabs.org; Fri, 17 Feb 2017 01:37:38 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44085) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cec5i-0001AW-Dt for qemu-devel@nongnu.org; Fri, 17 Feb 2017 01:32:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cec5h-0005eQ-Cq for qemu-devel@nongnu.org; Fri, 17 Feb 2017 01:32:26 -0500 Received: from mail-pg0-x241.google.com ([2607:f8b0:400e:c05::241]:34206) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cec5e-0005cc-Ie; Fri, 17 Feb 2017 01:32:22 -0500 Received: by mail-pg0-x241.google.com with SMTP id v184so4102211pgv.1; Thu, 16 Feb 2017 22:32:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=j8tbZ9viiD4TSkdGgc+2JXm2ns12/XmSBv3lmqM8OLI=; b=E0g2ST4VVg3E8oCYyiMr1ta8KMmvMx8Bipm1Hn7JARnY5SACtoLk3h9aE+ic7+eAMI /8AG1yWVjLWafaXf2AUHDcwTOIt9DQiHzyswfppcDEhHCRcPt2TcAC4xzVPAdO1kBRJ0 TUWgDZDOGIsydLGq362bdy4SVDxpeY9gfy5KoZNy3VanpbCz3z9zNLPSgu1ZHADNvaC4 JRTIjsparE8bnlIhZoYTpljjrE4kMWpQyQ1VLBUGRwBX6AC0uMKLN2iFyynStsGMx2lN GuioqZvdVSflnEFY8xRBPVqQDVK6cOUVs7LSYVzMarIb9QKWlbf7I0ODImsx8ocEz79Q lvsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=j8tbZ9viiD4TSkdGgc+2JXm2ns12/XmSBv3lmqM8OLI=; b=kijGQ8MDcgBOTY2K/1tjZSxnO4ozJEdgFQoI79/u0pMxTZtgwKJ+QAbMwXhwvOAi0l +/5YByn85nQn91h7l2rb9mxzdaBiyv9Xpib8+YLSLRUa4tNE/8dGfuasU4+oCvHnVlUd 091F018/8KbyU4Xm2iElC/wCyo0BsINfr1zRzAuYYj8Dl1BfhLUQb7+QExL7uyZBk1aB bGQLf5rntxLRUTmAWfUt+KwfytbA1829Qh5kS9//DEJXyQoCLrTMgC8JIf3jecJEHGDn MbmJSa175OpR5BP5b7dgEZnQMp2WDlmW7qNjCp82GHLL1EQjJS0BAcxb+z0FZmPexY3A 3nDA== X-Gm-Message-State: AMke39lupfzoNwbIPoLQfaXi9ciAa+rLMsLapZbI1QD+IyhnQEB24qzdPLTWkiLaVLv06A== X-Received: by 10.99.163.2 with SMTP id s2mr8127398pge.43.1487313141668; Thu, 16 Feb 2017 22:32:21 -0800 (PST) Received: from cavium-Vostro-2520.caveonetworks.com ([111.93.218.67]) by smtp.gmail.com with ESMTPSA id 89sm17074808pfo.40.2017.02.16.22.32.18 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 16 Feb 2017 22:32:20 -0800 (PST) From: vijay.kilari@gmail.com To: qemu-arm@nongnu.org, peter.maydell@linaro.org, christoffer.dall@linaro.org, eric.auger@redhat.com Date: Fri, 17 Feb 2017 12:01:51 +0530 Message-Id: <1487313115-9510-2-git-send-email-vijay.kilari@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1487313115-9510-1-git-send-email-vijay.kilari@gmail.com> References: <1487313115-9510-1-git-send-email-vijay.kilari@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c05::241 Subject: [Qemu-devel] [PATCH v8 1/5] kernel: Add definitions for GICv3 attributes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marc.zyngier@arm.com, p.fedin@samsung.com, qemu-devel@nongnu.org, Vijaya Kumar K Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Vijaya Kumar K This temporary patch adds kernel API definitions. Use proper header update procedure after these features are released. Signed-off-by: Pavel Fedin Signed-off-by: Vijaya Kumar K --- linux-headers/asm-arm/kvm.h | 12 ++++++++++++ linux-headers/asm-arm64/kvm.h | 12 ++++++++++++ 2 files changed, 24 insertions(+) diff --git a/linux-headers/asm-arm/kvm.h b/linux-headers/asm-arm/kvm.h index 2fb7859..1798c93 100644 --- a/linux-headers/asm-arm/kvm.h +++ b/linux-headers/asm-arm/kvm.h @@ -179,10 +179,22 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2 #define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32 #define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT) +#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32 +#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \ + (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT) #define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0 #define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT) +#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff) #define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3 #define KVM_DEV_ARM_VGIC_GRP_CTRL 4 +#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5 +#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6 +#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10 +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \ + (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff +#define VGIC_LEVEL_INFO_LINE_LEVEL 0 #define KVM_DEV_ARM_VGIC_CTRL_INIT 0 /* KVM_IRQ_LINE irq field index values */ diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h index fd5a276..b3f02ce 100644 --- a/linux-headers/asm-arm64/kvm.h +++ b/linux-headers/asm-arm64/kvm.h @@ -201,10 +201,22 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2 #define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32 #define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT) +#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32 +#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \ + (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT) #define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0 #define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT) +#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff) #define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3 #define KVM_DEV_ARM_VGIC_GRP_CTRL 4 +#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5 +#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6 +#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10 +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \ + (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff +#define VGIC_LEVEL_INFO_LINE_LEVEL 0 #define KVM_DEV_ARM_VGIC_CTRL_INIT 0 /* Device Control API on vcpu fd */