From patchwork Tue Jul 12 11:14:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leon Alrae X-Patchwork-Id: 647333 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rpfZ768sFz9s9Z for ; Tue, 12 Jul 2016 21:17:19 +1000 (AEST) Received: from localhost ([::1]:39029 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bMvgj-00084u-IP for incoming@patchwork.ozlabs.org; Tue, 12 Jul 2016 07:17:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47837) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bMvfB-0005gg-LT for qemu-devel@nongnu.org; Tue, 12 Jul 2016 07:15:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bMvf5-00020k-Pb for qemu-devel@nongnu.org; Tue, 12 Jul 2016 07:15:40 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:6984) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bMvf5-00020e-Jd for qemu-devel@nongnu.org; Tue, 12 Jul 2016 07:15:35 -0400 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id 9FC0C9CE6C7F4 for ; Tue, 12 Jul 2016 12:15:31 +0100 (IST) Received: from hhmipssw204.hh.imgtec.org (10.100.21.121) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.294.0; Tue, 12 Jul 2016 12:15:34 +0100 From: Leon Alrae To: Date: Tue, 12 Jul 2016 12:14:51 +0100 Message-ID: <1468322097-2315-6-git-send-email-leon.alrae@imgtec.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1468322097-2315-1-git-send-email-leon.alrae@imgtec.com> References: <1468322097-2315-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [10.100.21.121] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.59.15.196 Subject: [Qemu-devel] [PULL 05/11] hw/mips_cpc: make VP correctly start from the reset vector X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" When VP enters the Run state it starts execution from the reset vector. Currently used CPU_INTERRUPT_WAKE does not do that if reset exception base has been modified. Therefore fix that by simply resetting given VP. Drop the usage of CPU_INTERRUPT_WAKE also in VP_STOP and instead raise the CPU_INTERRUPT_HALT to halt a VP. Signed-off-by: Leon Alrae --- hw/misc/mips_cpc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/misc/mips_cpc.c b/hw/misc/mips_cpc.c index e6a35dd..6d34574 100644 --- a/hw/misc/mips_cpc.c +++ b/hw/misc/mips_cpc.c @@ -37,7 +37,7 @@ static void cpc_run_vp(MIPSCPCState *cpc, uint64_t vp_run) CPU_FOREACH(cs) { uint64_t i = 1ULL << cs->cpu_index; if (i & vp_run & ~cpc->vp_running) { - cpu_interrupt(cs, CPU_INTERRUPT_WAKE); + cpu_reset(cs); cpc->vp_running |= i; } } @@ -50,8 +50,7 @@ static void cpc_stop_vp(MIPSCPCState *cpc, uint64_t vp_stop) CPU_FOREACH(cs) { uint64_t i = 1ULL << cs->cpu_index; if (i & vp_stop & cpc->vp_running) { - cs->halted = 1; - cpu_reset_interrupt(cs, CPU_INTERRUPT_WAKE); + cpu_interrupt(cs, CPU_INTERRUPT_HALT); cpc->vp_running &= ~i; } }