From patchwork Thu Jun 23 05:48:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 639505 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rZrTY1bPRz9t26 for ; Thu, 23 Jun 2016 16:02:25 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b=anJ8zdfT; dkim-atps=neutral Received: from localhost ([::1]:34478 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFxiZ-0007cM-5V for incoming@patchwork.ozlabs.org; Thu, 23 Jun 2016 02:02:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35960) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFxTv-00078T-FE for qemu-devel@nongnu.org; Thu, 23 Jun 2016 01:47:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bFxTq-0002aU-C3 for qemu-devel@nongnu.org; Thu, 23 Jun 2016 01:47:14 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:35298) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFxTp-0002Yd-Nx; Thu, 23 Jun 2016 01:47:10 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 3rZr7q2J4hz9t1d; Thu, 23 Jun 2016 15:47:02 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1466660823; bh=MIcuH4cqPeWdnNci/Kqih+yRQV51q14xA4PW1ge1uj0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=anJ8zdfTfqUkZG2Q0mXb9LhD81kklSyhl1aGhnNoCyfQX6E8kDcTLHDi/C6J8CZxx VajPSgxPN6UUYn4jCDTvemR5OZn7k+W3AxmeNB6RPhHBaQ7n9r19c2JoJ3AJKo4E/w 97PDoKpU2KU0WWTk9HwcGbykehNO+r1O5OJChLzY= From: David Gibson To: peter.maydell@linaro.org Date: Thu, 23 Jun 2016 15:48:43 +1000 Message-Id: <1466660926-1544-15-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1466660926-1544-1-git-send-email-david@gibson.dropbear.id.au> References: <1466660926-1544-1-git-send-email-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 14/17] ppc: Turn a bunch of booleans from int to bool X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: agraf@suse.de, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , pbonzini@redhat.com, David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Benjamin Herrenschmidt Signed-off-by: Benjamin Herrenschmidt Reviewed-by: David Gibson Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson --- target-ppc/translate.c | 37 ++++++++++++++++++------------------- 1 file changed, 18 insertions(+), 19 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 2bbe210..55102bf 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -193,22 +193,21 @@ struct DisasContext { uint32_t opcode; uint32_t exception; /* Routine used to access memory */ - bool pr, hv, dr; + bool pr, hv, dr, le_mode; bool lazy_tlb_flush; int mem_idx; int access_type; /* Translation flags */ - int le_mode; TCGMemOp default_tcg_memop_mask; #if defined(TARGET_PPC64) - int sf_mode; - int has_cfar; + bool sf_mode; + bool has_cfar; #endif - int fpu_enabled; - int altivec_enabled; - int vsx_enabled; - int spe_enabled; - int tm_enabled; + bool fpu_enabled; + bool altivec_enabled; + bool vsx_enabled; + bool spe_enabled; + bool tm_enabled; ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */ int singlestep_enabled; uint64_t insns_flags; @@ -11496,7 +11495,7 @@ void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb) ctx.insns_flags = env->insns_flags; ctx.insns_flags2 = env->insns_flags2; ctx.access_type = -1; - ctx.le_mode = env->hflags & (1 << MSR_LE) ? 1 : 0; + ctx.le_mode = !!(env->hflags & (1 << MSR_LE)); ctx.default_tcg_memop_mask = ctx.le_mode ? MO_LE : MO_BE; #if defined(TARGET_PPC64) ctx.sf_mode = msr_is_64bit(env, env->msr); @@ -11507,25 +11506,25 @@ void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb) (env->mmu_model & POWERPC_MMU_64B)) ctx.lazy_tlb_flush = true; - ctx.fpu_enabled = msr_fp; + ctx.fpu_enabled = !!msr_fp; if ((env->flags & POWERPC_FLAG_SPE) && msr_spe) - ctx.spe_enabled = msr_spe; + ctx.spe_enabled = !!msr_spe; else - ctx.spe_enabled = 0; + ctx.spe_enabled = false; if ((env->flags & POWERPC_FLAG_VRE) && msr_vr) - ctx.altivec_enabled = msr_vr; + ctx.altivec_enabled = !!msr_vr; else - ctx.altivec_enabled = 0; + ctx.altivec_enabled = false; if ((env->flags & POWERPC_FLAG_VSX) && msr_vsx) { - ctx.vsx_enabled = msr_vsx; + ctx.vsx_enabled = !!msr_vsx; } else { - ctx.vsx_enabled = 0; + ctx.vsx_enabled = false; } #if defined(TARGET_PPC64) if ((env->flags & POWERPC_FLAG_TM) && msr_tm) { - ctx.tm_enabled = msr_tm; + ctx.tm_enabled = !!msr_tm; } else { - ctx.tm_enabled = 0; + ctx.tm_enabled = false; } #endif if ((env->flags & POWERPC_FLAG_SE) && msr_se)