From patchwork Thu Mar 31 08:39:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bharata B Rao X-Patchwork-Id: 603981 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3qbJ1Y3SCLz9sXQ for ; Thu, 31 Mar 2016 19:42:57 +1100 (AEDT) Received: from localhost ([::1]:58851 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1alYBr-0000If-LE for incoming@patchwork.ozlabs.org; Thu, 31 Mar 2016 04:42:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37743) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1alY9L-000438-S2 for qemu-devel@nongnu.org; Thu, 31 Mar 2016 04:40:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1alY9H-0001Wh-8Y for qemu-devel@nongnu.org; Thu, 31 Mar 2016 04:40:19 -0400 Received: from e28smtp01.in.ibm.com ([125.16.236.1]:42460) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1alY9G-0001VX-7R for qemu-devel@nongnu.org; Thu, 31 Mar 2016 04:40:15 -0400 Received: from localhost by e28smtp01.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 31 Mar 2016 14:10:06 +0530 X-IBM-Helo: d28relay04.in.ibm.com X-IBM-MailFrom: bharata@linux.vnet.ibm.com X-IBM-RcptTo: qemu-ppc@nongnu.org;qemu-devel@nongnu.org Received: from d28av02.in.ibm.com (d28av02.in.ibm.com [9.184.220.64]) by d28relay04.in.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u2V8dCWl61734948; Thu, 31 Mar 2016 14:09:13 +0530 Received: from d28av02.in.ibm.com (localhost [127.0.0.1]) by d28av02.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id u2V8drdo003949; Thu, 31 Mar 2016 14:09:55 +0530 Received: from bharata.in.ibm.com ([9.124.35.70]) by d28av02.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id u2V8dnRx003700; Thu, 31 Mar 2016 14:09:53 +0530 From: Bharata B Rao To: qemu-devel@nongnu.org Date: Thu, 31 Mar 2016 14:09:17 +0530 Message-Id: <1459413561-30745-9-git-send-email-bharata@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1459413561-30745-1-git-send-email-bharata@linux.vnet.ibm.com> References: <1459413561-30745-1-git-send-email-bharata@linux.vnet.ibm.com> X-TM-AS-MML: disable x-cbid: 16033108-4790-0000-0000-00000E8139C1 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 125.16.236.1 Cc: mjrosato@linux.vnet.ibm.com, thuth@redhat.com, pkrempa@redhat.com, ehabkost@redhat.com, aik@ozlabs.ru, Bharata B Rao , armbru@redhat.com, agraf@suse.de, borntraeger@de.ibm.com, qemu-ppc@nongnu.org, pbonzini@redhat.com, imammedo@redhat.com, mdroth@linux.vnet.ibm.com, afaerber@suse.de, david@gibson.dropbear.id.au Subject: [Qemu-devel] [RFC PATCH v2.1 08/12] spapr: Add CPU type specific core devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce core devices for each CPU type supported by sPAPR. These core devices are derived from the base spapr-cpu-core device type. TODO: - Add core types for other remaining CPU types - Handle CPU model alias correctly Signed-off-by: Bharata B Rao --- hw/ppc/spapr.c | 3 +- hw/ppc/spapr_cpu_core.c | 118 ++++++++++++++++++++++++++++++++++++++++ include/hw/ppc/spapr.h | 1 + include/hw/ppc/spapr_cpu_core.h | 36 ++++++++++++ 4 files changed, 156 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 64c4acc..45ac5dc 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1614,8 +1614,7 @@ static void spapr_boot_set(void *opaque, const char *boot_device, machine->boot_order = g_strdup(boot_device); } -static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, - Error **errp) +void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp) { CPUPPCState *env = &cpu->env; diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 8cbe2a5..3751a54 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -22,9 +22,127 @@ static const TypeInfo spapr_cpu_core_type_info = { .instance_size = sizeof(sPAPRCPUCore), }; +#define DEFINE_SPAPR_CPU_CORE(_name) \ +static void \ +glue(_name, _spapr_cpu_core_create_threads)(DeviceState *dev, int threads, \ + Error **errp) \ +{ \ + int i; \ + Error *local_err = NULL; \ + sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); \ + glue(_name, sPAPRCPUCore) * core = \ + glue(_name, _SPAPR_CPU_CORE)(OBJECT(dev)); \ + \ + for (i = 0; i < threads; i++) { \ + char id[32]; \ + \ + object_initialize(&sc->threads[i], sizeof(sc->threads[i]), \ + object_class_get_name(core->cpu)); \ + snprintf(id, sizeof(id), "thread[%d]", i); \ + object_property_add_child(OBJECT(core), id, OBJECT(&sc->threads[i]), \ + &local_err); \ + if (local_err) { \ + goto err; \ + } \ + } \ + return; \ + \ +err: \ + while (--i) { \ + object_unparent(OBJECT(&sc->threads[i])); \ + } \ + error_propagate(errp, local_err); \ +} \ + \ +static int \ +glue(_name, _spapr_cpu_core_realize_child)(Object *child, void *opaque) \ +{ \ + Error **errp = opaque; \ + sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); \ + CPUState *cs = CPU(child); \ + PowerPCCPU *cpu = POWERPC_CPU(cs); \ + \ + object_property_set_bool(child, true, "realized", errp); \ + if (*errp) { \ + return 1; \ + } \ + \ + spapr_cpu_init(spapr, cpu, errp); \ + if (*errp) { \ + return 1; \ + } \ + return 0; \ +} \ + \ +static void \ +glue(_name, _spapr_cpu_core_realize)(DeviceState *dev, Error **errp) \ +{ \ + sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); \ + CPUCore *cc = CPU_CORE(OBJECT(dev)); \ + Error *local_err = NULL; \ + \ + /* \ + * TODO: This is CPU model specific CPU core's realize routine. \ + * However I am initializing "threads" field of the parent type \ + * sPAPRCPUCore here. Is this ok ? If not I will have make "threads" \ + * part of CPU model specific CPU core type and have different plug() \ + * handlers for each type instead of having a common plug() handler \ + * for all core types. \ + */ \ + sc->threads = g_new0(PowerPCCPU, cc->threads); \ + glue(_name, _spapr_cpu_core_create_threads)(dev, cc->threads, &local_err); \ + if (local_err) { \ + goto out; \ + } \ + \ + object_child_foreach(OBJECT(dev), \ + glue(_name, _spapr_cpu_core_realize_child), \ + &local_err); \ + \ +out: \ + if (local_err) { \ + g_free(sc->threads); \ + error_propagate(errp, local_err); \ + } \ +} \ + \ +static void \ +glue(_name, _spapr_cpu_core_instance_init)(Object *obj) \ +{ \ + glue(_name, sPAPRCPUCore) * core = glue(_name, _SPAPR_CPU_CORE)(obj); \ + const char *type = stringify(_name) "-" TYPE_POWERPC_CPU; \ + ObjectClass *oc = object_class_by_name(type); \ + \ + core->cpu = oc; \ +} \ + \ +static void \ +glue(_name, _spapr_cpu_core_class_init)(ObjectClass *oc, void *data) \ +{ \ + \ + DeviceClass *dc = DEVICE_CLASS(oc); \ + dc->realize = glue(_name, _spapr_cpu_core_realize); \ +} \ + \ +static const TypeInfo glue(_name, _spapr_cpu_core_type_info) = \ +{ \ + .name = stringify(_name) "-" TYPE_SPAPR_CPU_CORE, \ + .parent = TYPE_SPAPR_CPU_CORE, \ + .instance_size = sizeof(glue(_name, sPAPRCPUCore)), \ + .instance_init = glue(_name, _spapr_cpu_core_instance_init), \ + .class_init = glue(_name, _spapr_cpu_core_class_init), \ +}; + +DEFINE_SPAPR_CPU_CORE(host); +DEFINE_SPAPR_CPU_CORE(POWER7); +DEFINE_SPAPR_CPU_CORE(POWER8); + static void spapr_cpu_core_register_types(void) { type_register_static(&spapr_cpu_core_type_info); + type_register_static(&host_spapr_cpu_core_type_info); + type_register_static(&POWER7_spapr_cpu_core_type_info); + type_register_static(&POWER8_spapr_cpu_core_type_info); } type_init(spapr_cpu_core_register_types) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 098d85d..0fdf448 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -585,6 +585,7 @@ void spapr_hotplug_req_add_by_count(sPAPRDRConnectorType drc_type, uint32_t count); void spapr_hotplug_req_remove_by_count(sPAPRDRConnectorType drc_type, uint32_t count); +void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp); /* rtas-configure-connector state */ struct sPAPRConfigureConnectorState { diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h index e3340ea..71e69c0 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -24,4 +24,40 @@ typedef struct sPAPRCPUCore { PowerPCCPU *threads; } sPAPRCPUCore; +#define TYPE_host_SPAPR_CPU_CORE "host-spapr-cpu-core" +#define host_SPAPR_CPU_CORE(obj) \ + OBJECT_CHECK(hostsPAPRCPUCore, (obj), TYPE_host_SPAPR_CPU_CORE) + +typedef struct hostsPAPRCPUCore { + /*< private >*/ + sPAPRCPUCore parent_obj; + + /*< public >*/ + ObjectClass *cpu; +} hostsPAPRCPUCore; + +#define TYPE_POWER7_SPAPR_CPU_CORE "POWER7-spapr-cpu-core" +#define POWER7_SPAPR_CPU_CORE(obj) \ + OBJECT_CHECK(POWER7sPAPRCPUCore, (obj), TYPE_POWER7_SPAPR_CPU_CORE) + +typedef struct POWER7sPAPRCPUCore { + /*< private >*/ + sPAPRCPUCore parent_obj; + + /*< public >*/ + ObjectClass *cpu; +} POWER7sPAPRCPUCore; + +#define TYPE_POWER8_SPAPR_CPU_CORE "POWER8-spapr-cpu-core" +#define POWER8_SPAPR_CPU_CORE(obj) \ + OBJECT_CHECK(POWER8sPAPRCPUCore, (obj), TYPE_POWER8_SPAPR_CPU_CORE) + +typedef struct POWER8sPAPRCPUCore { + /*< private >*/ + sPAPRCPUCore parent_obj; + + /*< public >*/ + ObjectClass *cpu; +} POWER8sPAPRCPUCore; + #endif