From patchwork Thu Mar 24 04:30:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 601454 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3qVtvx2376z9rxv for ; Thu, 24 Mar 2016 15:37:49 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b=m6TdSjFI; dkim-atps=neutral Received: from localhost ([::1]:47551 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aix1n-0007jM-9J for incoming@patchwork.ozlabs.org; Thu, 24 Mar 2016 00:37:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37480) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiwuO-0002K6-Qt for qemu-devel@nongnu.org; Thu, 24 Mar 2016 00:30:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aiwuE-00072W-7q for qemu-devel@nongnu.org; Thu, 24 Mar 2016 00:30:08 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:56136) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiwuD-00071D-FM; Thu, 24 Mar 2016 00:29:58 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 3qVtkj5PJvz9sf5; Thu, 24 Mar 2016 15:29:48 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1458793789; bh=sle92ad1KpOqjJiFyOtt4/fTcQ3fOA0E0T2vew5Qqtg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m6TdSjFIDP6BCSmK/EG+2zHNLL7HclKH4ffd/ayNDTkV/LETcfWpXoj1S+Cr8m95g 50taEapWqhIOMdAPu6FMX+phC0erdhvPFu+dO1MqLIvsPZEOakkRftE6qMbDi63UbQ h8+7iEvuRkDE9NSkKnSiP7BpMJmIBLKc7Fbimbtw= From: David Gibson To: peter.maydell@linaro.org Date: Thu, 24 Mar 2016 15:30:51 +1100 Message-Id: <1458793858-4010-10-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1458793858-4010-1-git-send-email-david@gibson.dropbear.id.au> References: <1458793858-4010-1-git-send-email-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Cc: thuth@redhat.com, agraf@suse.de, qemu-devel@nongnu.org, clg@fr.ibm.com, qemu-ppc@nongnu.org, David Gibson Subject: [Qemu-devel] [PULL 09/16] ppc: Fix writing to AMR/UAMOR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Benjamin Herrenschmidt The masks weren't chosen nor applied properly. The architecture specifies that writes to AMR are masked by UAMOR for PR=1, otherwise AMOR for HV=0. The writes to UAMOR are masked by AMOR for HV=0 Signed-off-by: Benjamin Herrenschmidt [clg: moved gen_spr_amr() prototype change to next patch ] Signed-off-by: Cédric Le Goater Reviewed-by: Thomas Huth Reviewed-by: David Gibson Signed-off-by: David Gibson --- target-ppc/translate_init.c | 74 ++++++++++++++++++++++++++++++++++++--------- 1 file changed, 59 insertions(+), 15 deletions(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 5125743..a5b59e7 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -1063,26 +1063,68 @@ static void gen_spr_7xx (CPUPPCState *env) #ifdef TARGET_PPC64 #ifndef CONFIG_USER_ONLY -static void spr_read_uamr (DisasContext *ctx, int gprn, int sprn) +static void spr_write_amr(DisasContext *ctx, int sprn, int gprn) { - gen_load_spr(cpu_gpr[gprn], SPR_AMR); - spr_load_dump_spr(SPR_AMR); -} + TCGv t0 = tcg_temp_new(); + TCGv t1 = tcg_temp_new(); + TCGv t2 = tcg_temp_new(); -static void spr_write_uamr (DisasContext *ctx, int sprn, int gprn) -{ - gen_store_spr(SPR_AMR, cpu_gpr[gprn]); + /* Note, the HV=1 PR=0 case is handled earlier by simply using + * spr_write_generic for HV mode in the SPR table + */ + + /* Build insertion mask into t1 based on context */ + if (ctx->pr) { + gen_load_spr(t1, SPR_UAMOR); + } else { + gen_load_spr(t1, SPR_AMOR); + } + + /* Mask new bits into t2 */ + tcg_gen_and_tl(t2, t1, cpu_gpr[gprn]); + + /* Load AMR and clear new bits in t0 */ + gen_load_spr(t0, SPR_AMR); + tcg_gen_andc_tl(t0, t0, t1); + + /* Or'in new bits and write it out */ + tcg_gen_or_tl(t0, t0, t2); + gen_store_spr(SPR_AMR, t0); spr_store_dump_spr(SPR_AMR); + + tcg_temp_free(t0); + tcg_temp_free(t1); + tcg_temp_free(t2); } -static void spr_write_uamr_pr (DisasContext *ctx, int sprn, int gprn) +static void spr_write_uamor(DisasContext *ctx, int sprn, int gprn) { TCGv t0 = tcg_temp_new(); + TCGv t1 = tcg_temp_new(); + TCGv t2 = tcg_temp_new(); + + /* Note, the HV=1 case is handled earlier by simply using + * spr_write_generic for HV mode in the SPR table + */ + /* Build insertion mask into t1 based on context */ + gen_load_spr(t1, SPR_AMOR); + + /* Mask new bits into t2 */ + tcg_gen_and_tl(t2, t1, cpu_gpr[gprn]); + + /* Load AMR and clear new bits in t0 */ gen_load_spr(t0, SPR_UAMOR); - tcg_gen_and_tl(t0, t0, cpu_gpr[gprn]); - gen_store_spr(SPR_AMR, t0); - spr_store_dump_spr(SPR_AMR); + tcg_gen_andc_tl(t0, t0, t1); + + /* Or'in new bits and write it out */ + tcg_gen_or_tl(t0, t0, t2); + gen_store_spr(SPR_UAMOR, t0); + spr_store_dump_spr(SPR_UAMOR); + + tcg_temp_free(t0); + tcg_temp_free(t1); + tcg_temp_free(t2); } #endif /* CONFIG_USER_ONLY */ @@ -1094,15 +1136,17 @@ static void gen_spr_amr (CPUPPCState *env) * userspace accessible, 29 is privileged. So we only need to set * the kvm ONE_REG id on one of them, we use 29 */ spr_register(env, SPR_UAMR, "UAMR", - &spr_read_uamr, &spr_write_uamr_pr, - &spr_read_uamr, &spr_write_uamr, + &spr_read_generic, &spr_write_amr, + &spr_read_generic, &spr_write_amr, 0); - spr_register_kvm(env, SPR_AMR, "AMR", + spr_register_kvm_hv(env, SPR_AMR, "AMR", SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_amr, &spr_read_generic, &spr_write_generic, KVM_REG_PPC_AMR, 0); - spr_register_kvm(env, SPR_UAMOR, "UAMOR", + spr_register_kvm_hv(env, SPR_UAMOR, "UAMOR", SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_uamor, &spr_read_generic, &spr_write_generic, KVM_REG_PPC_UAMOR, 0); spr_register_hv(env, SPR_AMOR, "AMOR",